Synopsys, the biggest supplier of software used to design semiconductors, is under investigation by the US Department of Commerce for possibly passing key technology to banned Chinese companies, according to people familiar with the matter.

Synopsys has announced a collaboration with TSMC to develop a broad portfolio of DesignWare Interface IP, Logic Libraries and Embedded Memories for the TSMC N7+ FinFET process.

Synopsys has announced it has been enhancing its design tools with AI technology to address the complexities of leading-edge design. AI-enhanced tools augment the Synopsys Design Platform and work with recently announced Fusion Technology to accelerate time-to-results (TTR) and set new standards for quality-of-results (QoR) in digital and custom design.

Synopsys and Black Duck Software have signed a definitive agreement for Synopsys to acquire privately held Black Duck, a leader in automated solutions for securing and managing open source software.

Synopsys has completed the acquisition of Gold Standard Simulations, a leading provider of TCAD and EDA simulation solutions for design technology co-optimization (DTCO) of advanced process nodes.

EDA and IP vendor Synopsys has introduced a new custom design tool that aims to help offset design challenges posed by the era of FinFETs with an intuitive concept dubbed visually assisted automation.

Synopsys has signed a definitive agreement to acquire Atrenta, a privately held provider of SoC realization solutions for the semiconductor and consumer electronics industries.

Synopsys has announced that its Galaxy Design Platform enables 90% of the production tapeouts of FinFET-based designs.

UMC has certified Synopsys' StarRC parasitic extraction solution for its latest 28nm process technologies, according to the EDA and IP vendor.

Synopsys has completed the acquisition of nSys Design Systems, a provider of verification IP.

EDA's industry "big three" held a panel session at DAC on the future of EDA and agreed that this is not "your father's recession."

Synopsys has announced TSMC selected its Galaxy Implementation Platform for their new integrated sign-off Flow. The new flow is now available for 65nm designs with planned extensions into other process technology nodes.

Synopsys has announced that its DesignWare DDR3/2 PHY and digital controller IP is the first DDR3 IP that has been fully verified in test silicon at 1600 Mbps, the maximum data-rate of the JEDEC DDR3 specification. DesignWare DDR3/2 PHY and the digital controller IP are available now in advanced process technologies for foundries.

As if the current downturn weren't challenging enough, the semiconductor industry is also headed for increasing challenges from higher design costs and production at smaller geometries, according to Aart de Geus, chairman and CEO of Synopsys.

MIPS Technologies on May 8 announced Synopsys has acquired its Analog Business Group in an all-cash transaction for US$22 million.

With revenues falling by as much as 50% in some electronics sectors and with entire markets undergoing fundamental changes, the old ways of doing business are not enough to thwart this downturn.