Cadence announces IP portfolio for TSMC 10nm FinFET process

Jessie Shen, DIGITIMES, Taipei Thursday 17 September 2015 0

Cadence Design Systems has announced an intellectual property (IP) portfolio for TSMC's 10nm FinFET (N10) process. Cadence has already secured multiple design wins with this portfolio and is actively engaged with customers as adoption of TSMC's leading-edge...

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