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Imagination introduces first MIPS Warrior CPU

Press release [Wednesday 13 November 2013]

Aiming to bring a strong alternative for the CPU IP market, Imagination announces the first MIPS Series5 'Warrior P-class' P5600 CPU core, representing a major step forward in feature set for high-performance MIPS CPU IP cores.

After the acquisition of MIPS, Imagination disclosed its new MIPS CPU roadmap in June, planning to update current portfolio of MIPS Aptiv cores. The P5600 is the first product based on this roadmap.

With the MIPS 'Warrior' family, Imagination adds new features like support for hardware virtualization across the entire range of cores which provides compelling benefits for applications from compute-intense enterprise environments to energy efficient mobile platforms.

Afterwards, Imagination will expand over the next 12 months to comprise a compelling portfolio of 64-bit and 32-bit variants, each delivering best-in-class performance, and benefiting from the unrivalled MIPS architecture that enables seamless migration from 32-bit to 64-bit solutions across the high-end, mid-range and entry-level/microcontroller CPUs.

Key features and Advantages

The P5600 supports multicore configurations of up to six cores per cluster with high-performance cache coherency, hardware virtualization, 128-bit SIMD, plus significant microarchitecture optimizations for maximizing SoC system performance.

In addition, the P5600 incorporates Enhanced Virtual Address (EVA) and Extended Physical Address (XPA) features that enable scalability to future generations of products. EVA enhances the effective use of the virtual memory space in the P5600, allowing both user and kernel space to access more than 3GB of space each without the need for HIGHMEM support in Linux. XPA extends the physical addressing capabilities of the P5600 up to 1 Terabyte. In combination with hardware virtualization, EVA and XPA extend the optimal usability of the P5600 well beyond other 32-bit CPUs.

The P5600 core delivers industry-leading 32-bit performance together with class-leading low power characteristics in a silicon footprint up to 30% smaller than comparable CPU cores, making it ideal for a wide range of mobile, consumer and embedded applications.

According to benchmarks, P5600 achieves industry-leading high-end CPU IP performance exceeding 5 CoreMark/MHz with 3.5 DMIPS/MHz, and provides 1.2x – 2x performance gains on a wide variety of system-oriented benchmarks, including SPECint2000, Linpack, and Javascript/Browser tests, and 2x – 3x higher data movement on widely-used routines such as MemCopy libraries.

While the P5600 CPU was designed first and foremost for the needs of mainstream application processing in smartphones, tablets, DTVs and connected consumer devices, the performance/power profile and extensive feature set extend the reach of this CPU core into additional markets, including a variety of networking applications such as residential gateways, 802.11ac routers, CPE modems, microservers, and various functional network appliances.

Why 128-bit SIMD and Hardware Virtualization Matter

SIMD is particularly useful in data-parallel applications such as audio codecs, image processing, DSP, low-level simple 2D graphics and other media-rich applications, and allows for implementation flexibility for emerging standards. The MIPS SIMD Architecture (MSA) features 150+ instructions, and was designed for easy code development using high-level languages such as C++ or OpenCL.

For example, the instruction set covers 100% of the compiler vector operations supported in the GNU compiler toolchain, which is beneficial both for code development and for supporting autovectorization of existing C code. Additionally, MSA provides a unique, faster exception model which means less work is required for exception processing.

On the virtualization side, the P5600 core is the first MIPS CPU IP core to include highly-optimized hardware virtualization as defined in the MIPS r5 architecture announced December 2012. The industry already uses virtualization technology extensively in applications for servers, automotive and other products requiring the use of multiple secure and isolated operating systems. Imagination is taking this concept to the next level, leveraging virtualization as the foundation for a growing number of applications demanding robustness, QoS, support for multiple security contexts and more.

The MIPS P5600 implements full hardware virtualization, with scalable support for many more than two independent operating systems running as guests, with no modification, fully isolated from each other. Virtualization has traditionally been used in servers needing many nodes operating separately in parallel, but this technology is expanding into an increasing variety of applications. For mobile and other similar applications, this ability to provide multiple isolated virtual domains contributes to a security framework that is scalable and extendable to the demands for multiple profiles on a device, with cloud-based content and transactions from many content sources.

In other applications it can provide mixed mode Linux and real-time environments in separate domains, with open source applications processing in one domain and real-time, latency sensitive tasks running in another, with QoS/priority.

MIPS–the choice in CPU IP

For Imagination, this is about much more than the arrival of yet another CPU IP core. This is the start of something much bigger - the rollout of a comprehensive family of next-generation CPUs that will change the CPU IP landscape forever.

Building on the true 32-bit and 64-bit instruction set compatibility of MIPS, Warrior cores will provide MIPS32 -> MIPS64 binary compatibility from the entry-level to the high-end. 64-bit Warrior cores have no need for excess 'baggage' to execute legacy 32-bit code, and the broad range of tools and applications built for the 64-bit MIPS architecture over the past 20+ years will seamlessly work with Warrior cores.

The industry desires choice in the CPU market, and Imagination is making MIPS a clear and superior alternative. Imagination has an outstanding range of cores available today, including the MIPS Aptiv generation of cores and the new P5600 processor kicking off the new Warrior family. Warrior cores are designed to provide levels of performance, efficiency and functionality that go beyond other offerings in the market.

The MIPS P5600 CPU is a perfect example of how Imagination's uncompromising MIPS architecture translates into a high performance, low power CPU. The P5600 CPU demonstrates Imagination's goal to provide system designers with a range of compelling building blocks - whether CPUs, graphics processors (GPUs), video processors (VPUs), radio processors (RPUs) or other processing units - that satisfy the increasing challenge of delivering peak performance while staying in a power envelope suited for target markets.

Prior to its acquisition by Imagination the future of the MIPS architecture had been unclear, which had an impact on the roadmap and overall business strategy. Those issues are resolved now and Imagination is focusing on delivering great hardware IP backed up by a strong ecosystem of software, tools and developers. Imagination also has a very strong link to the companies that matter: leading OS and toolchain providers, top-notch game developers and many others.

Imagination is fully confident in making the MIPS architecture a sustainable CPU IP choice in the market, especially with the rapid rise of Android-based devices. MIPS is one of the three fully supported architectures within the Android source code, and Google is keen to keep it that way.

Imagination remains number one in the GPU market by a considerable margin - more than the other GPU IP suppliers combined. Imagination's further innovations in MIPS CPUs and PowerVR GPUs over the next couple of years will be just as significant and will provide compelling reasons for current partners to keep using Imagination's IP and for other SoC vendors to switch to Imagination.

(image 1) The new MIPS Series5 Warrior CPUs offer true 32/64-bit instruction set compatibility and compelling features

The new MIPS Series5 Warrior CPUs offer true 32/64-bit instruction set compatibility and compelling features

(image 2) Block diagram of MIPS P5600 CPU IP core

Block diagram of MIPS P5600 CPU IP core


The DIGITIMES editorial staff was not involved in the creation or production of any sponsored content or press release provided in the commercial news wire service. Companies looking to contribute commercial news or press releases are welcome to contact us.

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