The global surge in AI demand is accelerating change across the semiconductor industry, and as Moore's Law scaling faces physical limits, chipmaking is no longer only about shrinking transistors. The industry is moving toward a "shrink and stack" model that combines continued scaling with increasingly complex 3D integration.

Where will China's electronics manufacturing industry find growth over the next five years? The answer is taking shape in the 15th Five-Year Plan for the sector, released by the Ministry of Industry and Information Technology (MIIT) and the National Development and Reform Commission (NDRC): industry revenue is targeted to exceed CNY30 trillion (US$4.47 trillion) by 2030.

DIGITIMES Intelligence observes that discussions at the semiconductor sustainability and energy forum during SEMICON Taiwan 2026 centered on two questions: whether Taiwan will have enough electricity to support continued semiconductor expansion driven by AI, and whether that electricity will come from renewable sources.

Taiwan's smaller IC design firms posted a strong revenue recovery in the first half of 2026, but the gains may prove difficult to extend. DIGITIMES said higher prices and early customer buying lifted sales, even as consumer demand remained soft. The second half now looks exposed to weaker momentum.

At SEMICON Taiwan 2026, Google outlined the direction of its AI infrastructure, and DIGITIMES notes that the discussion extended well beyond its next-generation TPU. Rather than focusing on a single chip, Google described how it links large numbers of TPUs into an integrated computing system spanning compute clusters, data centers, and ultimately multiple data centers, while also addressing the power constraints that emerge as the system continues to scale.

SK Hynix is reportedly considering Intel as an additional manufacturing source for high-bandwidth memory (HBM) base dies beginning with the HBM4E generation, a move that could reduce its reliance on TSMC and give the memory maker greater supply and cost flexibility.

"He practically created a new era—the age of AI," Mou-Shiung Lin said of Nvidia CEO Jensen Huang. Yet, the early TSMC executive describes the methodology behind that success in blunt terms: it is "violent."

ASML's latest update suggests High NA EUV is no longer confined to laboratory validation. With 10 systems already operating across four customers worldwide, and three more in shipment or installation, the technology is beginning to enter production ramp-up. The shift matters because adoption now hinges less on optical promise and more on whether chipmakers can justify the added cost.

Taiwanese chip packaging firms are advancing fan-out panel-level packaging (FOPLP) and glass-substrate development as AI processors demand ever-larger reticle sizes and more complex packaging. Their early manufacturing scale, automation progress, and substrate design choices could help determine who controls the next bottlenecks in high-end chip assembly.

Chinese GaN power semiconductor maker Innoscience gained direct access to capital markets after listing in Hong Kong at the end of 2024, giving it fresh funding to expand GaN capacity and technology development.

We previously discussed how automation removes environmental uncertainty, while autonomy requires systems to operate in complex settings. The biggest difference is that autonomous robots must enter unstructured environments and get work done, knowing where they are, what surrounds them, and how to move safely and efficiently while carrying out tasks.

Apple has finally unveiled the long-anticipated foldable iPhone Duo, with former CEO Tim Cook making a brief appearance at the start of the launch video. The moment suggested the device was Cook's farewell act, rather than John Ternus' first turn as chief executive, even as Apple used the 2026 fall event to frame its next stage of AI strategy.

Advanced packaging is stretching semiconductor inspection in two directions at once: packages are getting larger while the features inside them are getting smaller.

Advanced packaging is reshaping the semiconductor value chain, making materials innovation a key source of technical breakthroughs. As large-format panel-level packaging (PLP) gains traction, Resonac CTO for semiconductor materials Hidenori Abe told DIGITIMES that the company sees five major materials challenges: warpage, plating, coating, bonding, and polishing.

King Slide Works posted the fastest revenue growth in August among the 50 Taiwan-listed AI supply chain companies tracked by DIGITIMES, with sales up 318% from a year earlier. It marked the fourth consecutive month that the server rail kit maker more than doubled its revenue, following gains of 161% in May, 200% in June and 315% in July.