As the power demands for AI servers and racks continue to rise, data center power architectures are moving toward higher voltages and greater power densities. Ryan Chiu, Vice President of Conquer Electronics, noted that the rapid expansion of AI infrastructure is not only reshaping server and power system designs, but also raising the bar for circuit safety and long-term reliability.Ben Sung, Field Application Engineer (FAE) in Conquer's Sales and Marketing Division, explained that conventional AC/54V DC power architectures are increasingly constrained by rising power demands. As a result, the industry is moving toward high-voltage DC (HVDC) architectures, including ±400V and 800V systems. By increasing voltage, these architectures can reduce current and transmission losses, but they also place greater demands on circuit protection components. Fuses must therefore deliver higher DC voltage ratings, greater DC interrupting capability, lower demand loss, and enhanced reliability.Approaching its 50th anniversary, Conquer is extending its nearly five decades of expertise in circuit protection to emerging applications such as AI data centers and high-power power supplies. In response to the evolving power architecture landscape, the company continues to invest in the development of next-generation fuse technologies, expanding its high-power product portfolio while strengthening partnerships with customers across the AI and power infrastructure markets.Designing fuses for high-voltage, high-current, and high-temperature environments requires careful consideration of multiple factors, including materials, fuse-element structure, arc suppression, thermal management, and long-term aging. Sung noted that, depending on the application, fuses can be deployed at the output of power supplies, at the input and output of battery backup units (BBU) and power capacitance shelf (PCS), and at the output of power distribution units (PDU).Unlike circuit breakers or electronic protection devices, fuses require no external power or control. In high-voltage DC systems, they can rapidly and safely interrupt current in the event of a short circuit, even when fault currents reach several thousands of amperes, while working alongside other protection components to provide multiple layers of circuit protection.At the same time, the limited space inside AI servers requires fuses to withstand higher voltages and currents in increasingly compact form factors. This makes miniaturization, high current-carrying capacity, high interrupting capacity, and long-term reliability key considerations in fuse design.To address these requirements, Conquer Electronics incorporates simulation software early in the R&D process to analyze fuse-element characteristics, thermal stress distribution, and structural performance. By identifying temperature-rise and heat-dissipation risks before physical prototyping, and combining simulation with material testing, the company can streamline the product development process.The ACF and KBF series are examples of Conquer’s high-performance fuse solutions. Both offer a breaking capacity of up to 30kA, with the ACF measuring 7×32mm and the KBF measuring 10×32mm. The compact designs address the demands of high-power systems for space efficiency, high current-carrying capacity, and reliable circuit interruption.As AI product development cycles become shorter, Conquer is also engaging with customers earlier in the design process, helping them select the appropriate fuse base on operating voltage, current, ambient temperature, and available space. When standard products cannot meet specific requirements, the company can proceed with customized development.Chiu noted that customers today look beyond specifications and pricing, placing increasing emphasis on join development and speed to market. With UL and TÜV witnessed laboratories, Conquer can help shorten the safety certification process for customized products, bringing simulation, prototyping, validation, certification, and mass production into closer alignment with customer project timelines.This end-to-end capability, spanning R&D, testing, and mass production, is backed by nearly five decades of technical expertise at Conquer Electronics. Founded in 1977, the company has developed products for a wide range of markets, including household appliances, 3C electronics, mobile devices, and compact power supplies. Chiu stated that the firm's long-standing expertise in materials, manufacturing processes, testing, safety certifications, and automated mass production provides a strong foundation for expanding into high-power applications such as AI data centers.In materials and structural design, for example, Conquer has developed a patented alloy wire and integrated terminal design to replace conventional lead-based soldering. This approach reduces the risk of material fatigue caused by prolonged exposure to high temperatures while also reducing the use of hazardous substances.Chiu noted that when global customers evaluate suppliers, they look beyond product performance to factors such as joint development capabilities, certification lead times, mass production capacity, and supply reliability. In recent years, Conquer has invested in smart manufacturing and digitalized supply chain management. The company uses robotic process automation (RPA) to manage orders and has implemented ERP systems that connect its internal manufacturing execution system (MES) with customers'material requirements planning (MRP) systems, improving production scheduling and delivery visibility.ESG considerations are also integrated into Conquer’s daily operations and product development. The company has implemented energy management and greenhouse gas inventory systems, undergoes annual third-party audits, and regularly publishes sustainability reports. On the R&D side, product miniaturization and integrated structural designs help reduce material and energy consumption.Chiu said Conquer has long embraced the business principles of “Integrity and Quality, Excellence and Innovation, and Resource Conservation.” The principle of “Resource Conservation” extends beyond operations to product design and sustainable business practices. This R&D approach, centered on reliability and resource efficiency, is also becoming an important foundation for Conquer’s expansion into a broader range of high-power applications.As high-power applications continue to expand, circuit protection requirements vary across industries. Chiu noted that AI data centers place a strong emphasis on heat dissipation within space-constrained environments and long-term thermal stability. Electric vehicles (EV) must withstand driving vibrations, extreme temperatures, and material fatigue while meeting stringent automotive-grade requirements. Energy storage systems, which are often installed outdoors for extended periods, place greater emphasis on weather resistance, reliability through frequent charge and discharge cycles, and long service life.Looking ahead to the next 50 years, Chiu said Conquer Electronics will remain focused on its core mission of “providing circuit safety” and evolve into a “co-creation partner for circuit safety,” working alongside customers to solve challenges and expanding its collaboration across AI, energy storage systems, EVs, and other high-power applications.At the same time, Conquer will continue to build long-term trust through its commitment to “Integrity and Quality,” serving as a reliable supply chain partner for customers worldwide as they address increasingly stringent reliability requirements. Guided by its principle of “Resource Conservation," the company will also continue to reduce energy and material consumption throughout technology and product development. Circuit safety, supply chain resilience, and sustainable operations will serve as the three strategic pillars guiding Conquer’s next stage of growth.Conquer VP Ryan Chiu says 50 years of circuit protection expertise now covers AI, EVs, and LEOS.Credit: DIGITIMES

As the number of video and information sources in today's workplaces continues to grow, small control rooms, meeting rooms, and multimedia environments often need to connect multiple computers and other AV sources while displaying different types of content across multiple screens. Although conventional devices can switch between video sources, simultaneously displaying multiple sources, adjusting display layouts, and operating different computers often requires several separate devices. This not only takes up additional space but also makes daily operation more complicated.To meet the growing demand for multi-source video integration and simplified operation, CYP has introduced a new 4K60 seamless matrix switcher (model number: CPLUS-V4H2HUSB). In addition to routing any of the four AV sources to two displays, the matrix switcher allows users to arrange all four sources in Picture-in-Picture (PiP), Picture-on-Picture (PoP), or quad-view layouts. Users can operate connected computers through a single keyboard and mouse, while the on-screen windows can be repositioned and resized simply by dragging them with the mouse. As a result, multi-window layouts can be configured more intuitively and adapted to specific operational needs.The matrix switcher features two HDMI inputs and two USB Type-C inputs for connecting desktop computers, laptops, and other video devices. Two HDMI outputs support connections to two displays, with resolutions of up to 4K@60Hz 4:4:4 for clear, high-quality video.In matrix mode, users can switch seamlessly between video sources without the displays temporarily going black while the signal is being re-established. This ensures uninterrupted operation during system control, meetings, and video presentations. In addition to controlling multiple computers with a single keyboard and mouse, users can resize and reposition PiP windows by dragging them with the mouse, making multi-window operation as intuitive as rearranging windows on a computer desktop.Both USB Type-C inputs support video, USB data, and network connectivity while providing up to 45W and 30W of power delivery, respectively. With a single USB-C cable, users can quickly connect a laptop to the system to transmit video, access the keyboard and mouse, connect to a wired network, and receive power at the same time. The matrix switcher can also be controlled through its front-panel buttons, a mouse-operated on-screen display, Ethernet, or RS-232, allowing it to be used as a standalone device or integrated into an existing meeting room or control system.In a small control room, operators can combine live video, system status, data, and alarm notifications within a single display layout. The main window can be used for content that requires continuous attention, while smaller windows display supporting information. Alternatively, a quad-view layout can be used to monitor four sources simultaneously. With a single keyboard and mouse, operators can access and control different systems. When the cursor moves over a specific window, that window is highlighted with a border, helping operators confirm which system is currently active and reducing the possibility of errors when working across multiple systems.In meeting room applications, the matrix switcher can integrate presentations, video conferencing, participant feeds, and real-time data into a single viewing environment. For example, presentation content can be shown in the main window, while additional windows display remote participants, meeting materials, or reference information relevant to the discussion. Users can enlarge the content currently under discussion by dragging and resizing its window or reposition different sources to create a more suitable layout. When multiple types of information need to be viewed simultaneously, users can switch to a side-by-side or quad-view layout, reducing the need to repeatedly switch between sources.For multimedia and video presentation applications, the four video sources can be arranged in different layouts according to content and production requirements. This makes the matrix switcher suitable for live events, video monitoring, training sessions, product demonstrations, and corporate information displays. During a live event, for instance, the speaker, presentation materials, camera feed, and event information can be combined within a single layout. Likewise, production and monitoring teams can view multiple video sources simultaneously and quickly reposition or resize windows with the mouse as the event progresses or content priorities change.As video and information sources continue to increase, users need more than additional displays. They also need the flexibility to reorganize information for different scenarios and quickly access multiple systems. By combining dual-display 4K outputs, flexible multi-window layouts, drag and resize operation, seamless switching without black screens, and single keyboard and mouse control, CYP helps small control rooms, meeting rooms, and multimedia environments create clearer, more flexible, and more efficient video integration workflows.Multi-view Display For Conference. Credit: Cypress Technology

Interested in solving microcrack issues in through-glass via (TGV) fabrication? Want to learn how to supply 1,000 Watts, 1 Volt and 1,000 Amperes electricity to semiconductor IC chips in an AI multichip package while scaling up glass panel sizes? If so, visit iCometrue at Booth M0957, Hall 1, 4F, Taipei Nangang Exhibition Center during SEMICON Taiwan 2026!Glass substrates have emerged as a promising platform for large-size, high-performance AI multichip packages due to their superior thermal, mechanical, and electrical properties. At SEMICON Taiwan 2025 last year, iCometrue exhibited the Through-Polymer-Via (TPV) Connector, a novel technology that provides vertical interconnection in Glass Cores for use in Glass Interposers and BGA substrates to solve the microcrack problem in glass substrates caused by TGV fabrication.At SEMICON Taiwan 2026 this year, iCometrue plans to exhibit solutions for delivering 1,000 Watts, 1 Volt and 1,000 Amperes electricity to semiconductor IC chips in the high-performance AI multichip package. The solutions include:1. Embedding Cu blocks in glass substrates for power/ground delivery: Reducing the number of TPVs/TGVs originally used for power/ground delivery by 80%, thereby lowering fabrication complexity, improving manufacturing yield, and reducing manufacturing costs.2. Packaging Voltage Converter/Regulator (VCR) chips in the AI multichip package: Allowing high-voltage (for example, 48V) power supply input to the package and reducing power supply voltage (for example, down to 1V) within the package, based on the copper-block-based low resistance power delivery system. The innovated copper-block-based low resistance power delivery system reduces the heat generation.3. Embedding Si bridges, deep-trench decoupling capacitors (DTCs), and Voltage Converter/Regulator (VCR) chips in the frontside interconnection scheme over the glass substrate: Silicon bridges, DTCs, and VCR chips are embedded directly into the frontside interconnection scheme over the glass substrate, leaving large holes in the glass substrate dedicated to TPV connectors and copper blocks to streamline manufacturing.4. Installing electrical/optical connectors at the edges of the AI multichip package: This architecture uses electrical and/or optical connectors at the package edges for power and signal input/output, replacing the conventional power and signal routing that traditionally relied on bottom solder balls. This unleashes a TPV/TGV-free System-on-Panel (SOP) package, allowing thicker glass substrates that drastically reduce panel bending and enable larger manufacturing panel sizes.By using innovations mentioned above, iCometrue provides a scalable, practical alternative to traditional TGV processes. These breakthroughs extend Moore's Law into the era of glass-based system packaging, accelerating high-performance computing (HPC) and AI applications.

With an absolute maximum rating (AMR) of 75V, STMicroelectronics' L98GD8E is the only 48V automotive pre-driver to combine compliance with the ISO 21780 standard for 48V electrical systems and eight channels for high-side and low-side driving.The device's eight outputs are independently configurable for driving external high-side N-channel and P-channel, or low-side N-channel MOSFETs, allowing flexibility to handle loads in a variety of configurations. One IC can control up to two H？bridges in DC motor drives, or can manage multiple relays, resistive or capacitive loads, and provide peak&hold control for small valves. Channel 6 is suitable for driving safety-relevant loads requiring a dedicated enable pin.Typical applications for the L98GD8E include mild-hybrid systems such as powertrain and energy recovery, as well as auxiliary systems such as e-compressors and integrated starter generators. Capable of driving multiple loads, its flexibility simplifies leveraging the 48V powernet to increase power delivery, raise energy efficiency, and save weight by reducing wiring and connector current ratings.The L98GD8E helps meet the EMC regulations applying to automotive electrical systems by permitting MOSFET slew-rate control during both turn？on and turn？off. In addition, advanced diagnostic features help fulfil the high safety demands by protecting loads and detecting faults such as short-to-ground, short-to-battery, and open load in both ON and OFF conditions. Two integrated 10？bit ADCs, monitoring battery voltage and device temperature, enable dynamic and automatic overcurrent threshold compensation to adapt to all operating conditions.The L98GD8E is compatible with 3.3V and 5V logic and provides a high？speed SPI interface for configuring the IC and sharing diagnostic signals. As well as indicating external faults, the diagnostics also include built-in self-test (BIST), hardware self-checking (HWSC) of internal overvoltage-detection circuitry, and a communication check (CC) watchdog timer. The SPI also gives access to the battery and die temperature measurements. There are two disable pins that provide dual-redundant fast switch-off to further enhance system safety.The L98GD8E is in production now, in a 10mm x 10mm TQFP64 package. Budgetary pricing starts at $3.95 for orders of 1000 pieces.Please visit.

The intellectual property dispute between Corning and China-based IRICO has entered a new phase at the U.S. International Trade Commission (ITC), with the focus shifting from the finding of trade secret misappropriation to potential remedies affecting access to the U.S. market.On July 23, an ITC Administrative Law Judge (ALJ) issued an Initial Determination finding that IRICO and the remaining respondents had misappropriated Corning trade secrets related to its fusion glass manufacturing technology. The judge followed with a recommended remedy on August 6, and on August 7 the ITC issued a public interest notice disclosing part of that recommendation, including a proposed Limited Exclusion Order (LEO) against IRICO and the remaining respondents.The August 7 notice provided the first meaningful public indication of the remedies being considered. When the Initial Determination was announced in July, only limited information was available publicly. For Corning, the notice marks an important step toward potential enforcement measures following the ALJ's finding that its fusion-draw trade secrets had been misappropriated."Corning welcomes the initial determination and recommended exclusion order by the International Trade Commission. The determination makes clear that IRICO misappropriated Corning's proprietary fusion-draw technology, underscoring the value of Corning's innovations," said Brendan Mosher, International Vice President and General Manager, Corning Display Technologies."Protecting our intellectual property reflects our Values and our commitment to doing what's right for the last 175-years. Through these actions, we are safeguarding our innovations, our people, and our ability to do what we do best: transform industries, support our customers, and improve lives."Ruling Extends to Manufacturing and Downstream ProductsThe July 23 Initial Determination found that IRICO had misappropriated key Corning trade secrets related to fusion glass manufacturing, with the technology at issue broadly used across IRICO's glassmaking operations. The ruling did not narrow its scope based on glass generation size, glass composition, or other product-specific conditions, and applied to the remaining respondents in the case, including TCL, CSOT, and CHOT.That distinction is important because the central issue of misappropriation is not simply which glass formulation is being used, but how the glass is manufactured. If the final determination follows the current direction, changing a glass composition or product specification alone would be unlikely to provide IRICO with a workaround.Exclusion Order Raises the Stakes for Display ManufacturingThe August 7 public interest notice confirmed that the ALJ recommended a Limited Exclusion Order restricting U.S. imports of display products containing IRICO glass. For Corning, the significance of the remedy lies in how a dispute over manufacturing technology can carry through the broader display production chain.Display glass sits near the beginning of that chain. Once produced, the substrate moves through panel fabrication, module integration, and system assembly before ending up in televisions and other finished products. Because the case centers on the fusion manufacturing technology used to make the glass rather than on a single composition, Corning believes the ruling creates significant risk for customers that continue to source IRICO glass for products intended for the U.S. market.Corning is also seeking review of the recommended multi-year exclusion period, arguing that the evidence presented in the case supports a longer duration and that the final Commission determination could ultimately impose a longer restriction.Corning Seeks Review of Limited IssuesCorning has petitioned the full Commission to review several narrowly defined issues. Corning's petition does not challenge the central finding that IRICO misappropriated Corning's fusion technology, nor does it challenge the issuance of an exclusion order. Instead, they focus on clarifying the transparent process Corning has taken to protect intellectual property rights and support the growth of the display industry in China and across the globe."While we appreciate the ALJ's confirmation that IRICO misappropriated Corning's technology, as well as the recommended exclusion order, Corning is seeking review of certain statements in the determination ," said Mosher."We have consistently acted with transparency, integrity, and responsible stewardship of its innovations, while supporting the growth of the display industry, and will continue to take all appropriate steps to protect Corning's intellectual property."Corning maintains that it clearly and consistently communicated its concerns related to IRICO's misappropriation of its trade secrets, preserved its right to seek remedy, and presented substantial evidence in this regard.In addition, Corning maintains its course of action over the years with respect to IRICO and the display industry was reasonable and considerate, and that it had continuously taken measures over the years to protect its trade secrets.Commission Review Comes NextThe case has not yet reached a final ITC determination. Following the ALJ's Initial Determination, the full Commission reviews the decision and ultimately issues the Commission's Final Determination. Corning's current petitions are part of that process and identify the limited issues it wants the Commission to reconsider.Corning is also reiterating that intellectual property protection remains a fundamental part of its long-term research and innovation strategy. The company emphasizes that invention and innovation have been at the core of its business for 175 years and that its intellectual property reflects sustained investments in R&D, technology development, and industry collaboration. When it identifies unauthorized use or misappropriation of its technology, Corning says it will take the necessary steps to protect those investments.As the fusion trade secret case moves through Commission review, Corning will continue taking appropriate steps to protect its intellectual property while supporting the continued growth and development of the display industry.

With more than 35 years of experience in ASIC design services, Progate Group Corporation (PGC, TPEx: 8227), a member of the TSMC Design Center Alliance (DCA) and a Synopsys IP OEM Program partner, provides cost-effective and flexible ASIC turnkey services to help startups and enterprises overcome the barriers to customized chip development and accelerate their products from concept to mass production.PGC's integrated development path covers IP licensing, IP integration, IC design, physical implementation, tape-out, manufacturing, packaging, testing, and mass production - combining its ASIC design expertise with the TSMC ecosystem and Synopsys IP resources. PGC's website states that the company has taped out more than 1,500 projects at TSMC and supports both CyberShuttle/MPW and mass-production services.As artificial intelligence (AI) and high-performance computing (HPC) applications continue to expand, demand for customized ASICs is increasing across a wide range of applications, including AI acceleration, Edge AI, networking, and other computing applications. However, high non-recurring engineering (NRE) costs, complex IP integration, and lengthy development cycles remain major challenges for companies seeking to develop their own chips.Lowering the Barriers to ASIC DevelopmentASIC development has traditionally been dominated by large enterprises with significant semiconductor resources and engineering capabilities. With the rapid growth of AI applications, however, more startups and enterprises are looking to develop customized chips to achieve better performance, lower power consumption, and improved cost efficiency.PGC addresses these challenges through its one-stop ASIC turnkey service, giving customers access to the expertise and resources required throughout the chip development lifecycle without having to build a complete ASIC development organization internally.Through the Synopsys IP OEM Program, PGC also provides access to cost-competitive IP solutions and supports the integration of high-speed interface and other semiconductor IP, helping customers reduce IP licensing costs, simplify development, and shorten the overall design cycle. PGC's current service portfolio includes high-speed interface IP integration such as PCIe, USB, MIPI, SerDes, DDR, and die-to-die interfaces.Case Study 1: AI Startup Accelerates FPGA-to-ASIC Migration with MPW/Shuttle FlowAn AI startup specializing in image recognition initially used FPGA technology for product development. As market demand grew, the company faced increasing cost and power-consumption challenges, making the FPGA-based solution less suitable for large-scale production.After engaging PGC, the company transitioned from FPGA to ASIC through PGC's FPGA-to-ASIC solution. To reduce the initial development cost and lower the risk of ASIC adoption, the customer adopted an MPW/Shuttle flow for the first silicon implementation. PGC also integrated multiple high-speed interface IPs and managed the ASIC design flow from development through tape-out.The project achieved First Silicon Success on the first tape-out, along with a significant reduction in power consumption, an approximately 10 percentage reduction in overall cost, and an approximately 20 percentage reduction in time-to-market compared with the company's original FPGA-based development timeline.The project demonstrates how PGC's FPGA-to-ASIC solution and MPW/Shuttle flow can help AI startups reduce initial development costs and technical risks while providing a practical path from FPGA prototyping to ASIC implementation and subsequent mass production.PGC's existing service model supports the transition from smaller-volume MPW/CyberShuttle runs to full-mask development and high-volume production, allowing customers to select an appropriate development path as their products mature.Case Study 2: Edge AI Company Develops a Customized SoCAn Edge AI company sought to develop a customized SoC to meet growing demand for intelligent edge applications. Compared with conventional off-the-shelf solutions, a customized chip offered better integration, lower power consumption, improved performance, and greater flexibility for the company's target applications.Developing an ASIC requires expertise across system architecture, IP selection and integration, IC design, physical implementation, manufacturing, and testing. The company therefore sought an experienced ASIC partner to accelerate development while managing overall project cost and risk.PGC provided a comprehensive turnkey solution covering system architecture planning, IP integration, IC design, physical implementation, tape-out, manufacturing, packaging, and testing. By integrating the required IP and managing the development flow end to end, PGC helped the customer move efficiently from system requirements to a finished customized SoC.The result was improved system integration and performance, reduced overall system cost, and better power efficiency, giving the customer greater flexibility to optimize its chip for specific Edge AI applications.This case demonstrates PGC's ability to support not only AI startups but also companies developing next-generation Edge AI solutions, helping them build in-house customized chip capabilities and strengthen long-term product competitiveness.PGC has specifically highlighted FPGA-to-ASIC migration and Edge AI SoC development as important application areas, with its turnkey platform covering front-end design, back-end APR, tape-out, MPW/CyberShuttle runs, and subsequent production.Flexible ASIC Turnkey Services for Different Development NeedsPGC offers a flexible development model designed to support projects of different sizes and stages. Customers can choose from multiple development and manufacturing models, including MPW/Shuttle services, mass production (MP), and Customer-Owned Tooling (COT), allowing them to select an approach that matches their budget, production requirements, and long-term business strategy.For startups and companies entering ASIC development for the first time, an MPW/Shuttle flow can provide a practical and cost-effective approach for initial silicon development and validation. By sharing wafer costs across multiple projects, MPW can help reduce the upfront cost of producing prototype silicon compared with a dedicated full-mask approach.As products mature and production volumes increase, PGC can support customers in transitioning from prototype silicon to mass production. Its turnkey service covers the broader supply chain, including wafer fabrication, CP/FT testing, packaging, and production support.Through its one-stop turnkey model, PGC can coordinate IP, design, foundry, packaging, and testing resources, helping customers reduce project complexity and focus on their core product and application development.Combining TSMC, Synopsys and OSAT Ecosystem ResourcesPGC's turnkey model is built around close collaboration with major semiconductor ecosystem partners. As a certified member of the TSMC Design Center Alliance, PGC provides TSMC ASIC design and CyberShuttle services. The company also works with Synopsys through the IP OEM Program and collaborates with ASE and other OSAT partners for packaging and testing.This ecosystem-based approach allows PGC to integrate design, IP, manufacturing, packaging, and testing resources into a coordinated development flow. For startups and small and medium-sized companies, this can reduce the need to independently manage multiple semiconductor suppliers and technical interfaces throughout the ASIC development process.PGC also supports advanced-node ASIC development. Its current service portfolio includes TSMC 6nm, 5nm, 4nm, and 3nm FinFET processes, as well as advanced packaging services such as CoWoS.Looking AheadPGC plans to deepen its collaboration with ecosystem partners while expanding IP integration and advanced-process design capabilities, including support for more advanced TSMC process nodes and continued growth of its Synopsys IP OEM offerings.The company will continue to focus on helping startups and enterprises move from FPGA or off-the-shelf solutions toward customized ASIC architectures, particularly for AI, Edge AI, HPC, networking, and other high-growth applications.By combining ASIC design expertise, TSMC ecosystem resources, Synopsys IP access, and flexible MPW/Shuttle, MP, and COT models, PGC aims to help more companies overcome the traditional barriers to ASIC development.The goal is to lower development risk and cost, accelerate time-to-market, and provide a practical path from initial silicon development to mass production - enabling more startups and enterprises to build customized AI and Edge AI chips and strengthen their long-term product competitiveness.For more information, please visit the official website.

As demand for AI servers, high performance computing (HPC), and data center infrastructure accelerates, the semiconductor and power electronics test equipment market is experiencing strong growth. This momentum is expected to continue as advanced semiconductor technologies drive increasingly sophisticated testing requirements.Chroma ATE Inc., a company with more than two decades of experience in automated test equipment (ATE), recently held its Semiconductor Test Equipment User Conference in Hsinchu, Taiwan. Registration quickly reached capacity, reflecting the company's growing prominence in the semiconductor testing market. In 2025, Chroma reported consolidated revenue of US$943 million and grew its global workforce to nearly 4,000 employees.Credit: ChromaAddressing the Testing Challenges of the AI Era with In-House InnovationGeorge Chang, President of Chroma's Semiconductor Test Equipment Business Unit (STE BU), emphasized that Chroma is one of the few ATE suppliers with the in-house capability to develop  application-specific integrated circuits (ASICs) for its own test systems. This capability creates a "technology moat" that reinforces Chroma's competitive advantage.To address the diverse needs of the semiconductor testing market, Chroma has built its portfolio around three specialized test platforms. The Chroma 3680 is designed for advanced devices used in AI, HPC, microcontroller unit (MCU), and mixed-signal applications, the Chroma 3650 addresses power devices and systems-on-chip (SoCs), and the Chroma 3380 targets mainstream MCUs, Internet of Things (IoT) devices, and other chips manufactured on mature process nodes. Combined shipments across the three platforms have exceeded 4,000 systems. This year, Chroma also introduced the compact Chroma 3650-S2C platform for high-power devices, responding to increasingly rapid product cycles across the semiconductor industry.Proprietary PINF ASIC Enables Seamless Migration for Complex SoC TestingAs AI and HPC drive more complicated chip designs, testing is becoming more diverse and technically more demanding. At the same time, the industry is facing growing pressure to reduce costs and shorter test development schedules. Spancer Lee, Senior Manager of product marketing at Chroma's STE BU, explained that the Chroma 3680 integrates Chroma's next-generation, self-developed PINF ASIC with a range of specialized system boards, each supporting different test functions. This architecture enables comprehensive coverage across four major testing domains: digital, analog, mixed-signal, and RF devices. Chroma plans to continue expanding the platform's capabilities, leveraging the flexibility of its in-house hardware development to support high-precision testing of increasingly complex and high-frequency SoC devices. To accommodate the intensive data transfer and processing requirements involved with testing advanced semiconductor devices, the Chroma 3680 employs an 8-lane, 20 Gbps parallel high-speed data architecture. Optimized firmware enables high-speed transfer and more efficient processing of complex test data. The architecture also minimizes synchronization latency between digital and analog resources, improving resource integration for highly complex SoC test programs.The Chroma 3680 architecture is also compatible with certain probe card models used on competitor platforms. This allows customers to retain existing load boards and test programs without modifying their hardware, reducing migration costs while maximizing ROI and helping chipmakers gain a competitive edge in the market.Credit: ChromaChroma 3650-S2C Delivers High-Voltage Capability in a Compact FootprintWith NVIDIA signaling a transition toward direct 800V DC power delivery for server racks, semiconductor manufacturers face growing demand for high-voltage testing. To address this need, Chroma developed the 3650-S2C, a new test platform optimized for high-power semiconductor devices including silicon carbide (SiC) and gallium nitride (GaN). Through extensive engineering refinement, the platform's slot count was reduced to six, optimized for the requirements of intermediate-level testing. Chroma also substantially streamlined the external high-voltage power rack by integrating it directly into the test head. The 3650-S2C cuts the system footprint by half, enabling seamless integration with mainstream turret handlers for volume production while helping OSAT partners save valuable factory space and infrastructure costs.Aaron Chuang, Senior Manager of Advanced Technology Development at Chroma's STE BU, highlighted two key characteristics of the Chroma 3650-S2C: powerful high-voltage capability and a compact footprint. Building on the proven Chroma 3650-S2 platform, the solution integrates a high-voltage source-measurement unit (HVSMU) board to deliver a comprehensive, one-stop solution for five critical test parameters. It enables customers to safely and accurately overcome the 4 kV test threshold while maintaining production throughput, providing a powerful foundation for next-generation high-voltage power semiconductors to advance into mass production.Credit: ChromaIntegrated High-Density RF Technology Addresses Next-Generation Ultra-High-Frequency Wireless TestingThe rapid adoption of AI, edge computing, and intelligent connected devices continues to drive growth across Wi-Fi, Bluetooth, GNSS, IoT, mobile, and wearable applications. At the same time, wireless communication chipsets are undergoing a significant generational upgrade.To address these evolving requirements, Chroma has integrated its new HDRF3 (high-density radio frequency) test module into the Chroma 3680 platform. The solution is designed to support the increasing bandwidth, advanced modulation schemes, and multi-antenna architectures required by next-generation wireless technologies. This positions the company to capture the high-performance networking and AIoT chip packaging and testing markets.According to Jackson Hsu, associate director of application engineering at ADIVIC, a Chroma-affiliated company, Wi-Fi 7 expands channel bandwidth from 160 MHz to 320 MHz while increasing modulation density to 4096-QAM. These advances place exacting demands on RF performance and noise characteristics in test instrumentation. The HDRF3 test module was specifically developed to meet these requirements, extending operating frequencies up to 8 GHz and providing full coverage for Wi-Fi 7 as well as future Wi-Fi 8 implementations.ADIVIC also plans to launch an extension model, the 35809, featuring a simplified 16-port design while maintaining complete software compatibility with the production-oriented HDRF3 platform. The solution is targeted at applications requiring RF IC testing only. Chroma's in-house ASIC expertise allows the company to adapt the hardware architecture of its Chroma 3680, 3650, and 3380 platforms to distinct market requirements. From the space-efficient Chroma 3650-S2C to the high-density HDRF3 module, each development addresses emerging technical challenges across the semiconductor industry.Credit: ChromaThrough a combination of flexibility, high return on investment, and seamless platform migration strategies, Chroma helps customers accelerate adoption while reducing operational barriers. As AI, advanced computing, wireless connectivity, and power semiconductors continue to reshape the industry, Chroma is positioning itself as a long-term strategic partner for the world's leading semiconductor manufacturers.

SK hynix Inc. (or "the company", www.skhynix.com) announced today that its Board of Directors has approved a resolution to repurchase and fully cancel 40 trillion won worth of its own shares. The Company also revealed plans to return "over 50% of cumulative Free Cash Flow (FCF)" generated during the program period (2025-2027), adopting a framework centered on the parallel execution of share repurchases and cancellations alongside cash dividends.Following the Board meeting held earlier today, the Company formally disclosed the share repurchase and cancellation resolution along with the shareholder return plan via a regulatory filing.The decision stems from the assessment that the Company's intrinsic value—underpinned by its business competitiveness, robust cash generation capability, and mid-to-long-term growth potential—is not fully reflected in its current stock price.SK hynix continues to record record-breaking financial performance, maintaining its leadership in the AI memory market. As of the end of the second quarter of this year, the Company's net cash stood at approximately 69 trillion won, demonstrating significantly improved cash generation capability.The total planned amount for the share repurchase is 40 trillion won. Based on the closing stock price of 1,662,000 won on the day prior to the Board resolution, this represents approximately 24.07 million shares, or about 3.3% of total issued shares (730,492,365 shares). The repurchase period is scheduled to run for approximately three months starting August 20, with all repurchased shares set to be cancelled upon completion of the acquisition.This initiative accelerates the execution of the existing shareholder return program ahead of schedule. In November 2024, SK hynix announced a program to execute shareholder returns within the range of 50% of its three-year (2025-2027) cumulative FCF, noting that it would consider early execution prior to the program's expiration if FCF increased meaningfully due to improved operational performance.The 40 trillion won program marks the largest treasury share cancellation ever conducted by a South Korean listed company. The Company noted that progress toward its financial health targets remains on track, affirming its commitment to maintaining a stable financial structure while delivering sustained shareholder value.Through today's regulatory filing, SK hynix announced plans to pursue an expansion of its total shareholder return target from the previous "within 50% of cumulative FCF" to "over 50% of cumulative FCF". Under the framework, shareholder returns will be executed through a dual-track approach running share repurchases/cancellations alongside cash dividends, while options to expand payouts—including the existing fixed dividends and special dividends—are also under consideration.SK hynix emphasized that it intends to pursue additional shareholder returns within the program period through the parallel execution of share repurchases/cancellations and dividends, by taking into account cash flows, market conditions, and distributable profits, adding that specific details regarding scale and execution will be announced following Board approval at the time of its third-quarter earnings release.

For Malaysian engineering students entering their final semesters, the transition from academia to the professional world can feel daunting. Nicholas Tan Peng Gen, a Computer Engineering graduate from Asia Pacific University (APU), found himself at that exact crossroads just a year ago. Today, he is thriving as a Firmware Engineer at Phison Electronics' subsidiary MaiStorage in Malaysia, contributing to semiconductor R&D that powers storage devices globally. In a recent interview, Nicholas shared his journey of landing a role at Phison through the Taiwan Semiconductor Job Fair in Malaysia, the steep but rewarding learning curve of R&D work, and why more Malaysian students should consider global IC design houses like Phison to kickstart their careers.The Gateway: A "Two-for-One" Career OpportunityThe Taiwan Semiconductor Job Fair was organized as part of Taiwan's efforts to strengthen international semiconductor talent connections. Through initiatives supported by Taiwan's Industrial Development Administration (IDA), Ministry of Economic Affairs, Taiwanese semiconductor companies and academic institutions were brought together overseas to connect with promising STEM talents, introduce career opportunities, and build long-term talent partnerships with local universities.Nicholas's journey began when his university lecturers shared details about the Taiwan Semiconductor Job Fair. One lecturer even chartered a bus to ensure the entire class could attend. For Nicholas, who was seeking industry experience but was also curious about further studies, the fair proved to be an eye-opener."It wasn't just a regular job fair. It is an absolute must-attend because it's a rare 'two-for-one' opportunity. You aren't just getting face-to-face access to industrial heavyweights; you're also interacting directly with academic institutions from Taiwan offering funded master's and PhD programs," he said.Walking into the fair, Nicholas secured a direct live screening session, allowing him to have a genuine conversation with Phison's recruitment team rather than simply submitting a resume through an online portal.Shedding "Vibe Coding" for Real-World EngineeringTransitioning from university projects to a global semiconductor firm brought a fundamental shift in perspective. Nicholas noted that in university, students often get by with short-term, loosely structured code as long as it functions by the deadline.At Phison, the standards are stringent. Every line of code must possess meaning, clarity, and purpose so that it remains readable and robust before being deployed on actual hardware. This completely eliminates what modern developers refer to as "vibe coding," because guessing or patching on the fly is highly risky when dealing with complex controller chips. Instead, engineers must trace code step by step and thoroughly understand the system architecture, backed by a rigorous peer-review process where technical logic is closely scrutinized by experienced senior engineers to rapidly accelerate a junior engineer's competence.Why Phison? Full-Stack Architecture Exposure with a Strong Support SystemOne of the key advantages of joining a prominent Taiwanese multinational like Phison from its Malaysian branch is the depth of technical support available. When tackling highly complex technical issues, local teams are never isolated - they have direct access to decades of foundational expertise and the engineering resources of Phison's Taiwan headquarters.Furthermore, rather than being confined to a single, repetitive task, firmware engineers at Phison are given ownership of the full development pipeline. They read and interpret core design specifications, implement advanced features, write testing scripts, verify across multiple hardware platforms, and execute end-to-end debugging. Handling the full pipeline naturally trains engineers to think like system architects, enabling them to see the bigger picture of how their code interacts with physical hardware - making them versatile professionals much faster, Nicholas said.This borderless collaboration also cultivates strong cross-cultural communication skills. Nicholas noted that while Mandarin is commonly used, teams regularly converse in English and utilize translation tools, making the language barrier a manageable factor. Learning to document complete code-tracing workflows for cross-border engineering teams rapidly builds global competitiveness.Life at Phison Malaysia: A 9-out-of-10 ExperienceWhen asked to rate his job satisfaction at Phison Malaysia, Nicholas gave it a 9 out of 10. The semiconductor industry is fast-paced and demanding, but the work environment allows engineers to maintain clear boundaries and protect their personal time. Working at Phison's established branch in Malaysia offers a premier international career path without requiring graduates to relocate away from their families, making it a compelling option for local talent.The company culture also fosters supportive autonomy. Team members are highly collaborative, and while senior engineers are always available to troubleshoot, they challenge junior engineers to bring their own analysis to the table first - fostering independence and professional accountability.Advice to Graduating StudentsAs global demand for semiconductors surges - driven by the explosive growth of AI hardware - Malaysia's semiconductor ecosystem is rapidly moving up the value chain from back-end assembly and packaging into high-value R&D and IC design.For students weighing their next career steps, Nicholas offered one definitive piece of advice regarding the upcoming career fair: "Just go. You might walk out of there with a lot more clarity for your future. Taking on challenges early in your career helps you grow much faster, and the skills you build at an international standard with Taiwanese companies such as Phison are instantly transferable worldwide."From a university student seeking his first career opportunity to a firmware engineer contributing to global semiconductor products, Nicholas's journey demonstrates how international talent engagement can create new pathways for young engineers to connect with Taiwan's semiconductor industry.Through collaboration among Taiwan's semiconductor companies, academic institutions, and global STEM talent communities, more students like Nicholas can discover opportunities within Taiwan's semiconductor ecosystem and contribute to the next generation of semiconductor innovation worldwide.

BIOSTAR, a leading manufacturer of edge AI solutions, industrial motherboards, and edge computing systems, today announces its participation in embedded world North America 2026, taking place September 22–24, 2026 at the Anaheim Convention Center in Anaheim, California, USA. At Booth 6512 in Hall B, BIOSTAR will showcase its latest edge AI and IPC computing solutions, giving visitors a firsthand look at technologies developed for smart manufacturing, smart cities, and smart retail applications.At this year's expo, BIOSTAR will feature a comprehensive portfolio of industrial motherboards and EdgeComp systems, along with live demonstrations designed to address a wide range of edge computing requirements. Highlights include AI IPC solutions powered by Intel Core Ultra platforms, edge AI computing solutions featuring NVIDIA Jetson Orin and Thor platforms, and industrial-grade systems built for dependable deployment across commercial and industrial environments.The industrial motherboard lineup will include the Intel W880, Panther Lake as well as Wildcat Lake platforms. Spanning a range of platform configurations, form factors, and connectivity options, these boards give developers, system integrators, and industrial solution providers a flexible foundation for building application-specific IPC systems.BIOSTAR will also present an extensive selection of EdgeComp systems, including the Intel Panther Lake and NVIDIA Jetson Thor, Jetson Orin edge AI platforms, together with the new WildCat SBC rugged system. Ranging from compact single-board designs to higher-performance networking and gateway platforms, this lineup supports both conventional edge computing workloads and emerging edge AI applications across smart manufacturing, smart cities, and smart retail environments.Live demonstrations will feature the EdgeComp edge AI platforms. Together, these demonstrations will give visitors a practical view of how compact edge platforms can support real-time data processing, intelligent monitoring, and connected industrial applications.BIOSTAR invites industry professionals, system integrators, technology partners, and IPC innovators to visit Booth 6512 in Hall B and experience its latest edge computing and edge AI solutions firsthand. The BIOSTAR team looks forward to connecting with industry peers, discussing emerging application requirements, and exploring new opportunities for collaboration at embedded world North America 2026.