According to survey data from the Taiwan Society of Sleep Medicine, approximately one in every five people in Taiwan experiences insomnia. Many individuals live under prolonged psychological stress, resulting in an imbalance among stress, sleep, and lifestyle. The Huangdi Neijing (Yellow Emperor's Inner Canon) states: "When yang qi is exhausted, one sleeps; when yin qi is exhausted, one awakens." This concept suggests that the transition between sleep and wakefulness is fundamentally governed by the dynamic balance of yin and yang.From the perspective of Traditional Chinese Medicine (TCM), sleep is a process in which yang qi enters and is contained within yin. During the day, yang qi is active and dominant, whereas at night it should retreat inward and be stored within yin to facilitate restful sleep. When the balance between yin and yang is disrupted, yang qi remains excessively active at bedtime and fails to enter yin. This condition, known as "yang failing to enter yin," may correspond to heightened sympathetic nervous system activity, preventing both the body and mind from fully relaxing and resulting in difficulty falling asleep.Soothing the Liver, Nourishing the Blood, and Calming the MindChronic insomnia is often associated with prolonged stress, which may impair the TCM functions of the liver, including the regulation of qi flow (liver governs dispersion and dredging) and the nourishing of the mind through liver blood. Excessive stress can lead to liver qi stagnation, which may transform into internal heat and disturb the mind, causing insomnia. Alternatively, insufficient blood nourishment may fail to adequately support mental tranquility, resulting in poor sleep.Several traditional Chinese herbs are commonly used to address these conditions. Albizia Bark (He Huan Pi) and Rose Flower (Mei Gui Hua) may help soothe liver qi stagnation, relieve stress, and calm the mind. Sour Jujube Seed (Suan Zao Ren) and Lily Bulb (Bai He) are often used to nourish the heart and calm the spirit, thereby improving sleep quality.In addition, applying gentle pressure to the Shenmen (HT7) acupoint, located on the little-finger side of the wrist crease, may help calm the mind, reduce sympathetic nervous system overactivity, and alleviate insomnia.Aligning with Natural Rhythms and Maintaining Lifestyle BalanceTCM emphasizes the importance of "following the rhythms of nature" and maintaining balance in daily life to support healthy sleep. According to the concept of the Zi Wu Liu Zhu (Meridian Circadian Clock), it is recommended to go to bed before 11:00 PM (the beginning of the Zi hour). During this period, qi and blood are believed to circulate through the Gallbladder and Liver meridians, representing the time when yin energy is at its peak and yang energy begins to emerge.Staying awake beyond this time may allow yang activity to increase, which can stimulate the sympathetic nervous system and make it more difficult to fall asleep. Additional recommendations for promoting healthy sleep include obtaining adequate sunlight exposure during the daytime, limiting the consumption of coffee and caffeinated tea in the evening, avoiding electronic devices for at least one hour before bedtime, and ensuring that the bedroom is dark, quiet, and maintained at a comfortable temperature.By cultivating harmony between yin and yang and maintaining a balanced lifestyle, individuals may improve sleep quality and support overall physical and mental well-being.

As graduation season arrives, Taiwan's semiconductor industry once again enters its annual competition for talent. Driven by declining birth rates and surging demand for computing power fueled by the artificial intelligence (AI) boom, semiconductor companies have continued to expand their hiring efforts year after year. As labor shortages become increasingly serve, recruiting international talent has become a strategic imperative for companies seeking to maintain their competitive advantage. For years, ASE, the world's leading semiconductor packaging and testing company, and Micron, one of the world's leading memory manufacturers, have actively participated in the International Talent Development Program promoted by Taiwan's Industrial Development Administration (IDA) under the Ministry of Economic Affairs (MOEA). Through talent recruitment initiatives across Southeast Asia, coupled with comprehensive training programs and diverse employee benefits, both companies have successfully attracted professionals from various cultural backgrounds to pursue long-term careers in Taiwan.Southeast Asia emerges as a key source of international talentAccording to Sunny Li, Vice President of the Administrative Resources Center at ASE, the company began recruiting international professionals nearly 30 years ago during the early stages of its manufacturing expansion. Packaging and testing specialists from the Philippines, in particular, played a critical role in building the company's operational foundation."We initially recruited fewer than 100 employees, then expanded to 200. Following the COVID-19 pandemic, we recruited another 200," Li said. While ASE initially focused on attracting highly qualified white-collar professionals from the Philippines, the company's continued expansion in manufacturing capacity and business operations has significantly increased its demand for international operational talent.In addition to the Philippines and Malaysia, which remain key sources of international talent, ASE has recently attracted students from Indonesia and Vietnam, as well as professionals graduating from leading universities in countries such as the Republic of Nicaragua and Türkiye. Today, the company employs international professionals from more than 16 countries.Micron, currently the only global memory manufacturer with production facilities in Taiwan, has also participated in overseas talent recruitment missions organized by the Industrial Development Administration for many years, recruiting manufacturing and semiconductor packaging talent from Vietnam, the Philippines, and Indonesia."The government's overseas recruitment missions and talent training programs have provided tremendous support by encouraging companies to engage with international students much earlier," said Esther Cho, Director of Global Talent Acquisition at Micron Taiwan. "Through these initiatives, students can gain semiconductor industry experience through internships while studying in Taiwan, while also benefiting from access to the broader semiconductor ecosystem."Building Taiwan into an international talent development hubGiven that semiconductor companies recruit thousands of employees annually, failing to build a sustainable talent pipeline could pose significant business risks. In addition to overseas recruitment, both ASE and Micron actively collaborate with Taiwan universities, including I-Shou University, Cheng Shiu University, National Sun Yat-Sen University, National University of Kaohsiung, National Taiwan University, National Tsing Hua University, National Yang Ming Chiao Tung University, and National Taiwan University of Science and Technology, encouraging international students studying in Taiwan to participate in internships before graduation and transition directly into full-time positions.Li believes that retaining international students already studying in Taiwan through work visa and permanent residency programs has become an increasingly important strategy. These students have already adapted to Taiwanese culture and daily life while overcoming many of the language barriers during their studies, enabling them to integrate into corporate operations more quickly after graduation.ASE's recruitment of international graduates from Taiwanese universities has steadily increased from an initial 50 employees to 100, and the company expects to hire approximately 400 international graduates from Taiwanese universities this year."Developing international talent has always been one of our most important strategic investments," Li said. "We hope to cultivate a new generation of international management talent who can contribute in Taiwan and eventually assume leadership positions at our overseas operations.""Having such a loyal international workforce gives us greater confidence in sustaining double-digit annual growth," Li said. "For example, our operations in Malaysia already employ nearly 6,000 people. Whether Malaysian graduates choose to remain in Kaohsiung or eventually return to Malaysia, they represent valuable talent assets for our company."Li also praised the Industrial Development Administration's efforts to bring companies and universities together to recruit talent overseas, helping enhance the international visibility of Taiwan's semiconductor industry and its leading enterprises."The government's long-term commitment to these initiatives has enabled us to gradually build stronger international talent networks and generate cumulative momentum," Li said. "That is why we are now witnessing exponential growth in the number of international students choosing Taiwan."In fact, ASE and Micron are not alone. Taiwan is increasingly becoming an important global hub for semiconductor talent development. For example, talent development programs jointly operated by TSMC and overseas universities also bring international recruits to Taiwan for comprehensive training before assigning them to overseas operations. From a global business perspective, cultivating international talent in Taiwan is not only about addressing immediate labor shortages but also about developing the future managerial and technical backbone of semiconductor companies' global operations.Building an inclusive workplace to retain international talentAs global competition for semiconductor talent continues to intensify, Taiwan is strengthening its comprehensive support ecosystem for international talents. By aligning corporate initiatives with government resources, Taiwan seeks to create an environment that encourages international talent to pursue long-term career development and build their careers in the country.To encourage international talent to remain in Taiwan, ASE provides Mandarin language courses, assists foreign employees with permanent residency applications, and offers night-shift allowances of up to 40%. The company also places strong emphasis on cultural diversity and religious inclusion. In addition to hiring chefs from employees' home countries to prepare authentic cuisine, ASE organizes beauty pageants, recognizes outstanding international employee instructors through special awards programs, and celebrates Christmas and other major international festivals, creating an environment where international employees feel respected, valued, and connected to the organization.Li further suggested that Taiwan's government, industry, and academia should work together as "Team Taiwan" to continuously promote the competitiveness and global brand of Taiwan's semiconductor industry, thereby attracting more outstanding international talent to Taiwan.She also proposed that the government introduce tax incentives or tax credits to encourage companies to invest in scholarships, professional seminars, Mandarin language education, and other talent development initiatives. Such measures would further strengthen corporate participation in international talent development and maximize the impact of the Semiconductor International Talent Connection and Innovation Empowerment Program across talent recruitment, development, and retention.In addition to Mandarin courses, Micron assigns every international employee both a mentor and a buddy to help them adapt to life and work in Taiwan. The company's Employee Resource Groups (ERGs) also provide practical support on issues such as housing, taxation, and everyday life.Amid the rapid transformation of the global semiconductor talent landscape, Taiwan's competitive advantage comes not only from its world-class industrial strength, but also from its continuous efforts to build a friendly and development-oriented environment for international talent. When talent chooses to stay in Taiwan and grow alongside the industry, what Taiwan delivers is not only semiconductor technology, but also the key talent driving global innovation and sustainable competitiveness.

Discussion around advances in AI will often focus on model performance, chip launches, and compute scale. In practice, however, progress increasingly depends on something more fundamental: the ability to build faster, more reliable infrastructure for moving, processing, and managing data.That challenge starts well before systems reach the data center. It begins in the fabAs demand rises for accelerated computing infrastructure, advanced memory, and high-performance packaging, semiconductor manufacturers are being pushed to deliver devices capable of supporting a far more data-intensive economy. For fabs, the task is no longer limited to making smaller or faster chips. It is about sustaining the precision required to manufacture the hardware foundation of higher-throughput digital infrastructure.That shift is making the modern fab more dependent on a broader precision ecosystem.Better computing performance now depends on better data infrastructureWhat the market often labels as AI progress is increasingly tied to data infrastructure performance. Training and inference systems require more than advanced processors. They depend on moving massive volumes of data quickly, reliably, and efficiently across increasingly complex hardware environments.That demand is reshaping what fabs are being asked to produce. Growth is rising not only for leading-edge logic, but also for high-bandwidth memory, advanced interconnects, co-packaged optics, and sophisticated packaging approaches that support higher throughput with lower latency and better power efficiency. In effect, semiconductor manufacturers are being asked to fabricate the physical backbone of a faster data infrastructure layer.For fabs, this has direct consequences. As the value of each chip and subsystem rises, so does the cost of variation. More complex devices leave less room for process instability, optical inconsistency, or dimensional drift. Yield and repeatability become more important when end markets depend on that hardware to sustain reliable data flow at scale.The pressure on fabs is becoming more systemicPrecision is therefore becoming a system-level issue inside semiconductor manufacturing. Performance is no longer defined only by the nominal capability of an individual tool. It is increasingly shaped by how well the full production environment supports stability over time.Thermal behavior, structural integrity, optical quality, and light management all influence whether advanced tools can hold the tolerances required for next-generation devices. As process windows narrow, even small variations can affect overlay, imaging, inspection sensitivity, and ultimately throughput and yield.This has important implications for the ecosystem around the fab. Equipment makers need stable structures for alignment and imaging. Inspection systems need consistent optical performance and signal integrity. Metrology platforms need materials that can maintain dimensional integrity in highly controlled environments. In each case, enabling materials become part of the fab's performance infrastructure.That is why advanced material platforms are drawing more attention in semiconductor manufacturing. Leading ultra-low expansion and high-purity optical materials are already being used in precision-critical semiconductor environments where stability, optical quality, and repeatability matter. These materials may sit deeper in the stack than the tools themselves, but their contribution can be seen in long-term equipment performance and process consistency inside the fab."General industry analysis tends to focus on the most visible layers of semiconductor innovation, but the enabling materials behind tool stability and precision are becoming increasingly important as infrastructure requirements continue to rise,” said Jason Cho, business director of Semiconductor Technologies & Solutions, Corning. “As fabs are asked to support faster and more reliable data-centric systems, there is greater recognition that performance starts with the quality of the materials that help tools maintain repeatability, optical integrity, and dimensional stability over time."Inspection matters more when every chip supports data throughputAs accelerated computing infrastructure scales, the role of inspection is also changing. It is no longer only about detecting defects in support of incremental yield improvement. It is also about protecting the performance of devices that fabs are producing for systems built around continuous, high-volume data movement.That makes inspection and optical performance more strategically important inside semiconductor manufacturing. The ability to manage light effectively, maintain image quality, and reduce optical noise can influence how well fabs identify process deviations before they affect downstream device performance.This also helps explain renewed interest in some long-established optical materials. For example, Corning has reported recent increased interest in the company's Corning Polarcor glass polarizer, first brought to market around 1985. Although it is not a new product, companies developing optical components for for high-speed datacenters and communications systems have shown fresh interest in its polarization and light-control properties. That reflects a wider market realization: building fast, stable, and reliable infrastructure for data throughput depends not only on compute performance, but also on how well underlying optical systems control and optimize light propagation.For fabs, that same principle has direct relevance in inspection and imaging environments. As optical subsystems become more central to process control and yield protection, materials that improve contrast, reduce unwanted light effects, and support signal integrity can take on greater value. In a tighter manufacturing environment, foundational optical materials are being reassessed not as background inputs, but as contributors to overall fab capability.The fab is producing more than chips — it is producing the hardware foundation of data infrastructureOne of the most important shifts now underway is that semiconductor fabs are no longer just manufacturing devices in isolation. They are producing the hardware foundation for the next generation of data infrastructure.That includes processors, memory, photonic and optical components, and advanced packages designed to move, store, and process data more effectively. As a result, the quality of fab output is increasingly tied to the quality of the enabling infrastructure within the fab itself.This is leading to a broader reassessment of what matters in semiconductor manufacturing. Materials suppliers, optics providers, and component makers are not simply supporting production in the background. They are helping define the precision environment that advanced manufacturing now requires.As scaling becomes harder, process integration becomes more difficult, and end-market expectations continue to rise, that foundation matters more. Companies building the next generation of data-centric systems are beginning to recognize that reliable throughput starts with reliable manufacturing — and reliable manufacturing depends on the quality of the materials embedded throughout the fab ecosystem.A broader precision ecosystem will shape the next phase of growthAs the semiconductor industry expands capacity to support accelerated computing and next-generation data center infrastructure, competitiveness will depend on more than access to advanced tools or leading-edge process nodes. It will also depend on the strength of the precision ecosystem around the fab.That includes the materials that help equipment stay stable, the optical platforms that support inspection and imaging, and the component technologies that reduce variability in increasingly complex production environments. For fabs, OEMs, and supply-chain partners, the message is becoming clearer: better data infrastructure begins with better manufacturing infrastructure, and better manufacturing infrastructure depends on the materials selected to support it.The modern fab remains the center of semiconductor innovation. But as demand grows for faster and more reliable data throughput, its success will be shaped increasingly by the precision ecosystem built beneath it.

Taiwan is home to the world's most advanced semiconductor ecosystem. The island produces over 60% of global contract chip manufacturing and dominates key segments from IC design to advanced packaging. For international engineers, joining this ecosystem represents an opportunity to work at the frontier of chip technology - but succeeding here requires more than technical brilliance. It demands the ability to navigate a workplace culture shaped by decades of uniquely Taiwanese management practices, communication norms, and collaborative traditions.When Indonesian engineer Fabrice first arrived in Taiwan eight years ago, he assumed that technical expertise would determine his career trajectory in the semiconductor industry. Instead, he discovered that communication - not engineering - would become his steepest learning curve. Today, working as a Facilities (FAC) engineer at ASE Technology Holding (ASE), the world's largest semiconductor packaging and testing services provider, Fabrice sees himself not just as an engineer but as a bridge connecting Taiwanese managers with multinational teams.His experience is echoed by two younger Indonesian interns - IOSIF and Regina - both working in Sigurd Microelectronics Corp as  packaging and testing sector. Together, their stories suggest that Taiwan's systematic efforts to cultivate international talent are beginning to yield tangible results - and that the cross-cultural skills they have gained are becoming as valuable as their technical expertise.The transformation did not happen by chance. Through cross-cultural communication programs supported by Taiwan's Industrial Development Administration (IDA) under the Ministry of Economic Affairs, combined with on-the-job training from their employers and academic support from institutions such as Cheng Shiu University and Lunghwa University of Science and Technology, these young engineers learned that overcoming cultural barriers requires more than mastering Mandarin. It demands active listening, empathy, and the ability to interpret what is left unsaid.Navigating Taiwan's Communication Culture: Efficiency Meets HarmonyFor international professionals entering Taiwan's semiconductor workforce, one of the first adjustments involves understanding how Taiwanese colleagues communicate - a style that blends directness in pursuit of efficiency with a deep-seated respect for interpersonal harmony.For Fabrice, this was one of his earliest revelations. Growing up in Indonesia, conversations were often slower and more indirect in order to preserve social harmony. In Taiwan, colleagues spoke much more directly in pursuit of operational efficiency. At first, he interpreted their straightforwardness as unfriendly, only to realize later that it reflected a different communication culture rather than personal intent. Living in southern Taiwan added another layer of complexity, where meetings occasionally shifted into Taiwanese Hokkien - a regional dialect distinct from Mandarin - requiring him to ask follow-up questions after discussions.Those experiences shaped a simple but effective strategy: listen first, pause, and ask questions before making assumptions. Over four years at ASE, he says those habits have significantly strengthened both his emotional intelligence and his confidence in negotiating with Taiwanese vendors and multinational colleagues.IOSIF ( Chinese name: Li Zhongdi), who will join Sigurd Microelectronics Corp. as an engineer in Hukou while completing his Electrical Engineering degree at Lunghwa University, encountered a different dimension of the same communication culture. "Taiwanese colleagues, he discovered, rarely reject proposals outright. Instead, phrases such as "We'll think about it" or "Let's discuss it later" often serve as polite signals of disagreement - a reflection of the cultural importance placed on preserving "face" (miànzi) for all parties. Learning to read between the lines became essential for avoiding misunderstandings. Rather than viewing these indirect responses as obstacles, Joseph learned to probe gently with clarifying questions, allowing discussions to move forward without causing either side to lose face.Regina, another Indonesian student from Lunghwa University, will join Sigurd Microelectronics Corp. as a packaging and testing engineer in Hsinchu - Taiwan's semiconductor heartland, recalls that her biggest obstacle was not technical terminology but everyday workplace language. Local idioms such as mòmíng qímiào ( roughly "That doesn't make any sense") and heavily abbreviated Taiwanese expressions initially left her confused, though local colleagues often helped explain their meaning. Over time, she adopted an important communication habit: paraphrasing what others had said before responding. By repeating instructions or discussions in her own words, she created opportunities for teammates to correct misunderstandings immediately, preventing small communication gaps from escalating into costly engineering errors.Where Cultural Differences Become Innovation: Complementary Strengths in ActionBeyond communication, cultural diversity directly influences how engineering problems get solved in Taiwan's semiconductor fabs and testing facilities. Rather than creating friction, the interviewees found that different working styles often produce stronger outcomes when combined effectively.Joseph experienced this firsthand during a project where competing cultural priorities threatened progress. Taiwanese engineers tended to prioritize process discipline, quality assurance, and long-term reliability - hallmarks of the island's manufacturing excellence that have earned global customers' trust. Meanwhile, many international teammates focused on speed and meeting tight deadlines. Rather than allowing either approach to dominate, Joseph proposed building a small beta version. The prototype allowed the Taiwanese team to verify quality while enabling the project to stay on schedule-demonstrating that innovation often emerges from combining different approaches rather than choosing one over the other. He credits active listening and empathy for helping him recognize that workplace conflicts usually stem from differing assumptions rather than someone simply being wrong.Regina believes cultural diversity ultimately strengthens engineering teams. In her experience, Taiwanese colleagues excel at maintaining stability, following standard operating procedures, and pursuing perfection, while international teammates often contribute greater flexibility, speed, and creative thinking. Rather than viewing these traits as competing strengths, she sees them as complementary. She also applies empathy during negotiations, consciously asking why a colleague's perspective makes sense within their cultural context before searching for solutions that satisfy all parties involved.Drawing on his multicultural experience, Fabrice believes different nationalities bring complementary strengths that mirror the semiconductor industry's own need for both precision and adaptability. He describes Indonesians as practical and quick to solve problems, while Taiwanese colleagues tend to be more structured, rule-oriented, and focused on long-term solutions. In one recent project, he acted as the bridge between a Taiwanese manager and a Filipino engineering team, translating complex technical concepts into simpler language and helping each side understand the other's working style. By combining flexibility with discipline, the team completed the project ahead of schedule - reinforcing his belief that cultural diversity creates stronger teams.A Family-Like Workplace Culture: With Room to GrowFor international engineers considering a move to Taiwan, workplace culture is often a deciding factor. All three engineers praise Taiwanese companies for creating a welcoming, family-like environment that sets them apart from many multinational corporations. Managers and colleagues frequently check whether employees have eaten or how they are adapting to life in Taiwan, making foreign workers feel genuinely supported on both professional and personal levels.Yet they also identify one area for improvement: hierarchical organizational structures can discourage international employees from openly challenging managers or expressing dissenting opinions during meetings. Fabrice takes this observation further, arguing that Taiwan's semiconductor industry would benefit from promoting more international professionals into leadership positions. Greater diversity among managers, he believes, would not only improve inclusion but also enable companies to better serve their increasingly global customers and workforces.What International Engineers Gain from Taiwan's Semiconductor EcosystemDespite coming from different companies and career stages, Fabrice, Joseph, and Regina arrived at remarkably similar conclusions. Technical expertise may open the door to Taiwan's world-leading semiconductor industry, but long-term success depends on the ability to bridge cultures. The communication training provided through government initiatives, universities, and employers has equipped them with practical tools - active listening, clarifying questions, paraphrasing, empathy, and cultural awareness - that extend far beyond the classroom and are transferable to any global workplace.As Taiwan seeks to attract and retain more international semiconductor talent, these young engineers demonstrate that the industry's next competitive advantage may not come from faster chips alone, but from people capable of connecting diverse teams across cultures. For engineers worldwide considering where to build their semiconductor careers, Taiwan offers not just cutting-edge technology but a unique environment where cross-cultural competence becomes a career-defining skill.

This year's SEMICON Taiwan will be packed with discussions about artificial intelligence and the on-wafer challenges it's creating, where the advanced node and emerging technology worlds collide. And at the center of it all is the need for better process control at a reduced cost-of-ownership (CoO).Right now, manufacturers are being told to buy high-priced tools designed for the front-end advanced node world - often delivering more performance than needed at a CoO that breaks the bank. It's time to break the cycle and deliver what customers want and need at a CoO that is designed to meet the needs of their business and not simply the needs of the OEM.Enter Onto Innovation.Take control of your process and break free from costly, unnecessary platforms and patchwork solutions that prevent you from achieving truly connected process control.Here's how Onto Innovation fights the status quo and puts manufacturers in control.Advanced Node Logic: Controlling Structures at the Limits of PhysicsAt the leading edge, 3D architectures are evolving fast. Gate-all-around (GAA) nanosheets require control of individual sheet dimensions, while future complementary field-effect transistor (CFET) structures will intensify 3D metrology requirements. Both demand precise nanowire control with the data richness and enhanced signal-to-noise ratio (SNR) needed to extract more than a single dimension from a single measurement.Powered by Ai Diffract modeling software, Onto's optical critical dimension (OCD) portfolio provides the precision to identify dimensional drift in complex GAA and CFET structures. Onto's films metrology portfolio measures the ultra-thin oxide, high-k metal gate, and P/N metal stack films that make up these devices. Together, these metrology solutions help manufacturers catch process drift before it becomes a downstream issue.Advanced Memory: Keeping Pace With Vertical ScalingAs 3D DRAM and 3D NAND scale vertically and device density increases, metrology has to keep pace. Manufacturers face increasingly stringent requirements for high spectrum resolution and sensitivity, and Onto's OCD and films metrology portfolio delivers the tools to stay in control as memory scales.Silicon Photonics: Controlling a Fundamentally New Kind of DeviceSilicon photonics (SiPh) and co-packaged optics (CPO) are scaling toward broader high-volume manufacturing (HVM) adoption. These architectures can integrate laser sources, waveguide-based silicon chips, micro-lenses, and opto-electronic converters, with each introducing unique process-control challenges. Defects can show up anywhere along the optical path - in the V-grooves and micro-lens arrays that couple and align light, the waveguides that route it, the EEL/VCSEL devices that generate it, and the module-level packaging (through glass vias, bump, hybrid bonding, and reflectors) that holds it all together. Any of these defects can negatively impact yield and performance. Onto's metrology and inspection portfolio enables manufacturers to address these key touchpoints with confidence.Materials Intelligence: Control That Starts Below the SurfaceNot every problem appears as a visible defect. Charge trapping, interface states, dopant profiles, and crystalline defects can erode device performance and reliability long before a part reaches test – often beyond the reach of standard metrology recipes. Onto's materials intelligence tools are built for this layer of control: FAaST for charge and interface characterization, CnCV and QUAD for yield-critical electrical insights, Aspect S for material and structure characterization of high aspect ratio (HAR) trenches and TSV, and Celero PL for crystalline defect intelligence. With Onto, manufacturers are able to identify the variations dimensional measurements alone cannot see.Advanced Packaging: Managing Complexity Where Device Types ConvergeLogic, memory, and increasingly photonics come together in an advanced package to act as one system. Process steps like hybrid bonding, TSV, silicon thinning, and copper pad recess and dishing/topography control introduce errors that don't exist in front-end flows. Copper that protrudes or recesses even slightly at a bond interface, for example, can undermine an otherwise perfect hybrid bond; this is why hybrid bonding requires tight control of surface topography, including copper pad recess and dishing/topography, along with inspection designed to catch the sub-micron, low contrast, and non-visible defects standard inspection tools can miss. Interposers, meanwhile, introduce their own set of challenges one layer down, where measuring HAR deep trench capacitors and TSV is as demanding as it is in any 3D memory stack, and where high-speed infrared (HSIR) inspection is needed to catch defects below the surface.This need for visibility is just as important, if not more so, in an AI package. Each component in an AI package- GPU or CPU, multiple HBM stacks, an interposer, a panel substrate, and CPO - is a process control touchpoint. Onto's portfolio addresses these directly: logic OCD and film metrology for the GPU/CPU, HBM bump and RDL inspection for the memory stack, interposer inspection for the layer connecting them, panel lithography and inspection for the substrate, and SiPh/CPO module inspection wherever optics are integrated - all tied together by process control and analytics software.Dragonfly G5: One Platform for Multiple Device TypesThe Dragonfly G5 system shows what taking control across device types looks like. The system delivers sub-micron defect sensitivity down to 150nm, with best-in-class throughput across front-end, back-end, and advanced packaging applications. That versatility extends beyond traditional wafer-based manufacturing. Specialty and photonics opportunities are evaluated by application, on a single platform that handles wafers and 310×310mm panels, including glass.This unrivaled versatility is the result of several complementary inspection technologies on one platform, each one designed for a different kind of defect: brightfield and darkfield imaging for standard inspection, 3Di technology for bump metrology, a new illumination mode for sub-micron, low-contrast defects (e.g. CMP, hybrid bonding), Clearfind technology for non-visible defects, and HSIR inspection for sub-surface defects. Outfitted with TrueADC Turing machine learning classification software, the Dragonfly G5 helps manufacturers reduce nuisance defects and improve defect matching and classification accuracy.The result is a platform that follows manufacturers across device types rather than forcing them to qualify a different tool for each type. The same underlying system supports front-end and back-end inspection, advanced packaging steps like hybrid bonding and 2.5D integration, and selected specialty/photonics inspection applications.Taking Control, Device by DeviceAdvanced node logic, advanced memory, silicon photonics, advanced packaging, critical films, and AI packages feature different physics, materials, and failure modes. Onto's approach to each is the same: give manufacturers a clear, connected view of their process so problems are addressed before they become expensive.That's what taking control of your process really means - not one tool built for one device, but a portfolio designed to give manufacturers visibility and confidence across the full range of their products.SEMICON Taiwan attendees can find the Onto team at Booth L0728, September 2-4. Stop by and learn how comprehensive process control solutions can help you take control of your process, yield, and future roadmap.

Interested in knowing how to solve the microcrack problem in through-glass via (TGV) fabrication? Interested in knowing how to supply 1,000 Watts, 1 Volt and 1,000 Amperes electricity to semiconductor IC chips in an AI multichip package? Interested in knowing how to increase the glass panel size for manufacturing AI multichip packages? If so, visit iCometrue® at Booth M0957, Hall 1, 4F, Taipei Nangang Exhibition Center during SEMICON Taiwan 2026!Benefiting from their excellent thermal, mechanical, and electrical properties, glass substrates have emerged as a promising platform for large-size, high-performance AI multichip packages. At SEMICON Taiwan 2025 last year, iCometrue® exhibited the Through-Polymer-Via (TPV) Connector, a novel technology that provides vertical interconnection in Glass Cores for use in Glass Interposers and BGA substrates to solve the microcrack problem in glass substrates caused by TGV fabrication.At SEMICON Taiwan 2026 this year, iCometrue® plans to exhibit solutions for delivering over 1,000 W and over 200 A of power supply to the high-performance AI multichip package. The solutions include:(1) Embedding Cu Blocks in Glass Substrates for Power/Ground DeliveryCu blocks are used to replace TPVs/TGVs for power/ground delivery. This approach significantly reduces the number of TPVs/TGVs originally used for power/ground delivery through the glass substrate by 80%, thereby lowering fabrication complexity, improving manufacturing yield, and reducing manufacturing costs.A current high-performance AI multichip package, comprising GPU chips and HBM modules, has more than 10,000 I/Os for power, ground, signal, and clock distribution, which requires more than 10,000 TGVs/TPVs in the glass substrate. 80% of these TGVs/TPVs in the glass substrate are used for power/ground delivery. Using Cu blocks to replace TPVs/TGVs for power/ground delivery results in an 80% reduction in the number of TPVs/TGVs, thereby lowering fabrication complexity, improving manufacturing yield, and reducing manufacturing costs. Nowadays high-performance semiconductor IC chips in AI multichip packages typically require more than 1,000 W of power. Since power (P) is given by P=I×V, a 1 V operation voltage of semiconductor IC chips corresponds to a current over 1,000 A.As shown in Fig. 1, the embedded Cu blocks provide the power/ground voltage and current paths that would otherwise require a large number of TPVs or TGVs in the glass substrate. The remaining TPVs/TGVs (approximately 20%) are reserved for signal and clock transmission. Consequently, the embedded Cu blocks significantly reduce the number of TPVs/TGVs in the glass substrate.The formation of embedded Cu blocks in glass substrates is achieved by inserting Cu blocks into pre-formed large holes in the glass substrate. This process is similar to the TPV Connector embedding process in glass substrates previously disclosed at SEMICON Taiwan 2025.(2) Packaging Voltage Converter/Regulator (VCR) chips in AI Multichip PackagesThe VCR chips are packaged vertically under and close to the GPU chip within the AI multichip package. The embedded VCR chips convert the 1,000 W, 48 V, 21 A power supply from external circuits to 1,000 W, 1 V, 1,000 A for the GPU chip. As shown in Fig. 1, copper blocks provide a low resistance power delivery system from external circuits to the embedded VCR chips, and resulting in reduction of the heat generation.(3) Embedding Si Bridges, DTCs, and VCR chips in the Frontside Interconnection Scheme Over the Glass SubstrateAt SEMICON Taiwan 2025, iCometrue® demonstrated that Si bridges and DTCs are embedded in large holes within the glass substrate. Here in Fig. 1, iCometrue® shows that Si bridges, DTCs, and VCR chips are instead embedded in the frontside interconnection scheme over the glass substrate, while the TPV connectors and copper blocks are embedded in large holes in the glass substrate. This approach further simplifies the fabrication of the AI multichip package using a glass substrate.(4) Installing Electrical/Optical Connectors at the Edges of the AI Multichip PackageWhen glass substrates are used for multichip packaging, power and signals are usually input and output via the solder balls on the bottom of the multichip package through the backside interconnection (under the glass substrate), TPVs/TGVs (in the glass substrate), and the frontside interconnection (over the glass substrate) to the semiconductor chips. As discussed above, the fabrication of TPVs/TGVs is one of the major challenges in glass-substrate technology. To solve this problem, iCometrue® has introduced an innovative architecture that enables a large-size System-on-Panel (SOP) multichip package using a thick glass substrate without TPVs/TGVs.As shown in Fig. 2, power and signals are delivered through electrical and/or optical connectors located at the edges of the multichip package rather than through solder balls on the bottom of the package. The glass substrate is used as a panel-level fabrication platform and remains in the final package to provide mechanical support. An interconnection scheme (metal line and polymer) is built on the glass substrate, with electronic components such as interconnection bridges, integrated passive devices (IPDs), and VCR chips embedded within it. Semiconductor chips (CPU, GPU, ASIC, HBM) are then flip-chip bonded onto the interconnection scheme above the glass substrate. Electrical and/or optical connectors, together with passive components, are mounted on the top surface of the interconnection scheme using surface-mount technology (SMT).Credit:iCometrueBecause power and signals are supplied by the edge connectors instead of bottom solder balls, signal transmission and power distribution from the edge connectors to semiconductor chips are through the interconnection scheme. Consequently, no TPVs or TGVs are required in the glass substrate, enabling large-size System-on-Panel (SOP) packages. Further, since no TPVs or TGVs are required, a thicker glass substrate can be used, which greatly reduces the bending of the glass panel. Thereby, the size of the glass panel used in the fabrication can be greatly increased.More than Moore: The Use of Glass Substrates for Multichip PackagingiCometrue® is pioneering a new era of advanced multichip packaging by introducing glass substrates with embedded TPV Connectors and Cu blocks, providing a practical and scalable alternative to conventional TGV-based processes. Further, embedding Si bridges, DTCs, and VCR chips in the frontside interconnection scheme over the glass substrate simplifies the fabrication of the AI multichip package. Combined with the TPV/TGV-free thick glass substrate architecture for System-on-Panel (SOP) packaging, these technologies establish a foundation for the next generation of multichip integration, extending Moore's Law into the era of glass-based system packaging and accelerating the advancem

As AI infrastructure drives demand for higher bandwidth, lower power consumption and faster connectivity, silicon photonics is becoming increasingly important to the future of computing. However, moving technologies such as silicon photonics and co-packaged optics (CPO) from development to commercial deployment presents a critical challenge: how to achieve reliable, high-volume production.To address this challenge, ficonTEC will host its Expert Seminar – Asia, "The Future is Powered by Photonics – Building the Manufacturing Ecosystem Behind AI Infrastructure," on September 8, 2026, in Hsinchu, Taiwan.The event will bring together experts from across the photonics and semiconductor ecosystem to discuss how companies can move from prototype to production, overcome emerging bottlenecks and shorten time-to-market.From innovation to industrializationAs photonic technologies become increasingly important to AI infrastructure, proving that a technology works is no longer enough. Manufacturers must also achieve the repeatability, yield, throughput and cost efficiency required for volume production.The seminar will explore challenges across assembly, testing, fiber handling and production automation, along with the technologies and partnerships needed to address them.Speakers from Femtum, Hermes Testing Solutions (HTSI), BizLink, USI and ficonTEC will share perspectives from different parts of the ecosystem. A DIGITIMES industry presentation and cross-industry panel will further examine what it takes to scale photonics.From Machine to FactoryA program highlight will be ficonTEC's deep dive into its Intelligent Automation Platform, showing how digital twins, automated assembly, testing, fiber preparation, factory software and AI can be connected across the production environment.The focus extends beyond individual equipment to connecting capabilities from Machine to Line to Factory—helping photonics companies accelerate the transition from engineering development to scalable production.One ecosystem. One challenge: scale.No single company can address every challenge involved in photonics industrialization. Scaling silicon photonics requires collaboration across equipment, testing, connectivity, manufacturing and supply-chain partners.This is particularly relevant in Hsinchu, at the heart of Taiwan's semiconductor and advanced electronics ecosystem. As AI accelerators, advanced packaging and high-speed optical interconnects evolve, closer integration between photonics and established semiconductor production will become essential.The central question is shifting from "Can we develop the technology?" to "Can we manufacture it at the speed, yield and scale required by the AI economy?"Join industry experts in Hsinchu to explore how the photonics ecosystem can turn breakthrough technologies into scalable production. Register now to request your seat. Request your seat at the ficonTEC Expert Seminar – Asia. 

As transistor scaling becomes more difficult and costly, advanced packaging has become one of the most important paths for extending Moore's Law. Technologies such as 2.5D integration, 3D ICs, chiplets, and heterogeneous integration allow the semiconductor industry to continue improving system-level performance by bringing more functions, memory, and interconnects closer together inside increasingly sophisticated package architectures.The rise of artificial intelligence is accelerating this shift. AI accelerators, high-bandwidth memory, and large-scale computing systems require higher bandwidth, lower latency, better power efficiency, and greater integration density. As a result, advanced packaging is no longer simply a back-end process consideration. It is becoming a central technology platform for enabling next-generation computing performance.This transition is also changing the role of materials. In advanced packaging, materials do more than provide mechanical support. They influence manufacturability, warpage control, dimensional stability, interconnect density, electrical performance, yield, and long-term reliability. As package architectures become larger and more complex, glass is drawing greater attention as a potential materials platform for demanding semiconductor packaging environments.Corning is among the materials suppliers addressing these requirements, drawing on its experience in glass formulation, dimensional control, and high-volume manufacturing to develop glass-based solutions for advanced packaging.Materials Move to the Center of Advanced PackagingAs advanced packaging becomes more central to semiconductor evolution, its technical challenges also become more difficult to manage. Larger package sizes increase the risk of warpage and mechanical distortion. Higher interconnect density requires finer patterning and more stable electrical behavior. The integration of chiplets, HBM stacks, interposers, and heterogeneous components creates more complex physical architectures, where differences in materials, thermal behavior, and mechanical stress must be carefully controlled. At the same time, manufacturers must maintain tighter tolerances and higher yields across increasingly demanding process flows.These pressures are making materials a more decisive factor in advanced packaging. Next-generation packages must not only connect more components in a smaller, denser space; they must also maintain electrical performance, structural stability, thermal reliability, and dimensional precision throughout manufacturing and operation. As AI packages continue to scale in complexity and functionality, the materials used in carriers, substrates, and other packaging structures can directly influence what can be manufactured efficiently and what can perform reliably at scale.In this environment, conventional materials may face limitations. Maintaining both dimensional stability and interconnect density becomes more difficult as package sizes grow. If a material cannot preserve flatness, surface quality, and mechanical stability across increasingly demanding process flows, it can affect bonding, patterning, alignment, and ultimately yield.That is why glass is gaining relevance in semiconductor applications. Glass offers potential advantages in flatness, dimensional stability, surface quality, and precision processing. These attributes are especially important as advanced packaging moves toward larger form factors, thinner wafers, and higher-density integration.Glass Carriers Support ManufacturabilityOne of the most immediate applications of glass in semiconductor manufacturing is as a carrier substrate supporting thin-wafer processing for HBM, 3D stacking, and other advanced packaging technologies. As wafers become thinner to support HBM and 3D stacking, manufacturers face growing challenges in warpage control, wafer handling, and yield.Thin wafers can be fragile and difficult to process without temporary support, especially during thinning, bonding, redistribution, and fan-out processing. Glass carriers can help address these challenges by providing a stable, highly flat supporting platform. In advanced packaging, a carrier must hold the wafer securely,  maintain dimensional stability through demanding process conditions, and also support precise handling and release without introducing additional process risk.Glass offers potential advantages in flatness, dimensional stability, surface quality, and precision processing.Corning's advanced packaging carriers are designed for temporary bonding in advanced semiconductor packaging processes, including silicon wafer thinning, fan-out packaging, and advanced 2.5D/3D packaging. The company's carrier portfolio includes both standard glass carriers and advanced packaging carriers, reflecting the need to support different levels of process complexity across the semiconductor manufacturing flow.For manufacturers, the value of glass carriers lies in enabling more stable, high-yield processing. By providing flatness, stability, and precision, glass carriers can help reduce warpage and handling challenges in increasingly demanding packaging environments. This makes them an important enabling material for the production side of advanced packaging.Glass Core Technology Targets Performance at ScaleWhile glass carriers address the immediate manufacturability challenges of thin-wafer processing, glass core substrates point to a longer-term shift in package architecture. As AI and high-performance computing packages become larger and integrate more chiplets, HBM stacks, and high-density interconnects, conventional organic substrates can face increasing pressure from warpage, dimensional variation, and electrical limitations. Glass is therefore being evaluated not only as a temporary process support, but also as a potential structural platform for next-generation packages.The technical appeal lies in glass's dimensional stability, flatness, and ability to support finer interconnect geometries. These properties can help package designers increase interconnect density, improve layer-to-layer alignment, and build larger system-in-package structures while maintaining tighter process control.Corning's own activities show that glass has already moved beyond laboratory research in adjacent advanced-packaging processes. Its high-precision glass carriers are used for temporary bonding in wafer thinning, fan-out processing, and advanced 2.5D and 3D packaging.According to Corning, the company has shipped hundreds of thousands of carrier wafers to top-tier customers, that include foundries, HBM manufacturers, and outsourced semiconductor assembly and test providers. Corning also offers glass carriers across a range of coefficients of thermal expansion and says its advanced packaging carriers can reduce in-process warpage by as much as 40%.Carrier applications are distinct from permanent glass core substrates. The combination of production-oriented carrier deployments provides practical evidence of the industry's broader direction. As packages become larger and more tightly integrated, glass is emerging as a materials platform that could support both near-term process stability and longer-term opportunites in package density, electrical performance, and scalability."What we're seeing across the ecosystem is growing recognition that advanced packaging challenges cannot be solved through design alone," said Eric Chiang, Business Development Director, Packaging & Wafers, Corning Incorporated. "Materials innovation is becoming an increasingly important contributor to overall package performance and manufacturability."Corning Brings Glass Expertise to Advanced PackagingCorning's role in semiconductor packaging builds on decades of display glass leadership and a 175-year legacy in materials science. Capabilities in precision glass formulation, ultra-flat surfaces, dimensional stability, surface quality, tight process control, and high-volume manufacturing are increasingly relevant as advanced packages become larger, thinner, and more complex.Glass carriers and glass core technology give Corning two complementary paths into this market. Carriers support thin-wafer handling, warpage control, process stability, and yield. Glass core technology is being explored to address longer-term needs for larger package formats, finer interconnects, and improved electrical performance.Through close collaboration with semiconductor ecosystem partners and customers, Corning has developed a clear understanding of how advanced packaging is evolving. The company is applying that insight, together with its glass science and manufacturing expertise, to develop materials solutions that support the industry's next generation of packaging performance and manufacturability.

NewPower Worldwide, one of the electronics industry's fastest-growing distributors, today announced it has expanded its committed credit facility to $750 million, further enhancing its ability to invest in inventory, support customer growth, and capitalize on opportunities across the global supply chain.The increase follows a period of exceptional growth for NewPower Worldwide. Since its founding in 2014, the company has rapidly expanded its global footprint, growing to 14 offices across the Americas, EMEA, and APAC, with $5 billion in annual sales, and managing more than $1 billion in inventory worldwide. The expanded facility provides additional financial capacity to support continued growth and evolving customer requirements.In today's rapidly changing supply chain environment, financial strength and access to capital play a critical role in securing inventory and maintaining continuity of supply. The expanded facility enhances NewPower's ability to purchase strategically, support large-scale customer requirements, and provide greater flexibility around inventory and delivery programs."Our customers rely on NewPower to solve supply chain challenges quickly and at scale," said Carleton Dufoe, Chief Executive Officer of NewPower Worldwide. "Expanding our credit facility to $750 million gives us additional capacity to secure inventory, support larger strategic programs, and respond faster when opportunities arise across the market. It further strengthens our ability to deliver solutions that help customers succeed in any market environment."The expanded facility strengthens NewPower's ability to support larger and more complex customer programs while increasing the volume and scale of transactions the company can execute globally. By increasing its purchasing capacity, NewPower is better positioned to secure strategic inventory, capitalize on market opportunities, and deliver supply solutions to customers with greater speed, flexibility, and scale."Our expanded partnership with NewPower reflects our confidence in the company as it executes on behalf of its clients," said Jason Upham, Senior Vice President at Citizens. "Our banking team led an increased credit facility designed to support NewPower's goals and growth objectives."The expanded facility reflects NewPower's continued financial strength and enhances its ability to convert market opportunities into tangible supply solutions for customers worldwide. Combined with the company's global sourcing network and supply chain expertise, the added capacity positions NewPower to execute larger programs, secure critical inventory, and help customers respond to changing market conditions with speed, flexibility, and confidence.

As the number of video and information sources in today's workplaces continues to grow, small control rooms, meeting rooms, and multimedia environments often need to connect multiple computers and other AV sources while displaying different types of content across multiple screens. Although conventional devices can switch between video sources, simultaneously displaying multiple sources, adjusting display layouts, and operating different computers often requires several separate devices. This not only takes up additional space but also makes daily operation more complicated.To meet the growing demand for multi-source video integration and simplified operation, CYP has introduced a new 4K60 seamless matrix switcher (model number: CPLUS-V4H2HUSB). In addition to routing any of the four AV sources to two displays, the matrix switcher allows users to arrange all four sources in Picture-in-Picture (PiP), Picture-on-Picture (PoP), or quad-view layouts. Users can operate connected computers through a single keyboard and mouse, while the on-screen windows can be repositioned and resized simply by dragging them with the mouse. As a result, multi-window layouts can be configured more intuitively and adapted to specific operational needs.The matrix switcher features two HDMI inputs and two USB Type-C inputs for connecting desktop computers, laptops, and other video devices. Two HDMI outputs support connections to two displays, with resolutions of up to 4K@60Hz 4:4:4 for clear, high-quality video.In matrix mode, users can switch seamlessly between video sources without the displays temporarily going black while the signal is being re-established. This ensures uninterrupted operation during system control, meetings, and video presentations. In addition to controlling multiple computers with a single keyboard and mouse, users can resize and reposition PiP windows by dragging them with the mouse, making multi-window operation as intuitive as rearranging windows on a computer desktop.Both USB Type-C inputs support video, USB data, and network connectivity while providing up to 45W and 30W of power delivery, respectively. With a single USB-C cable, users can quickly connect a laptop to the system to transmit video, access the keyboard and mouse, connect to a wired network, and receive power at the same time. The matrix switcher can also be controlled through its front-panel buttons, a mouse-operated on-screen display, Ethernet, or RS-232, allowing it to be used as a standalone device or integrated into an existing meeting room or control system.In a small control room, operators can combine live video, system status, data, and alarm notifications within a single display layout. The main window can be used for content that requires continuous attention, while smaller windows display supporting information. Alternatively, a quad-view layout can be used to monitor four sources simultaneously. With a single keyboard and mouse, operators can access and control different systems. When the cursor moves over a specific window, that window is highlighted with a border, helping operators confirm which system is currently active and reducing the possibility of errors when working across multiple systems.In meeting room applications, the matrix switcher can integrate presentations, video conferencing, participant feeds, and real-time data into a single viewing environment. For example, presentation content can be shown in the main window, while additional windows display remote participants, meeting materials, or reference information relevant to the discussion. Users can enlarge the content currently under discussion by dragging and resizing its window or reposition different sources to create a more suitable layout. When multiple types of information need to be viewed simultaneously, users can switch to a side-by-side or quad-view layout, reducing the need to repeatedly switch between sources.For multimedia and video presentation applications, the four video sources can be arranged in different layouts according to content and production requirements. This makes the matrix switcher suitable for live events, video monitoring, training sessions, product demonstrations, and corporate information displays. During a live event, for instance, the speaker, presentation materials, camera feed, and event information can be combined within a single layout. Likewise, production and monitoring teams can view multiple video sources simultaneously and quickly reposition or resize windows with the mouse as the event progresses or content priorities change.As video and information sources continue to increase, users need more than additional displays. They also need the flexibility to reorganize information for different scenarios and quickly access multiple systems. By combining dual-display 4K outputs, flexible multi-window layouts, drag and resize operation, seamless switching without black screens, and single keyboard and mouse control, CYP helps small control rooms, meeting rooms, and multimedia environments create clearer, more flexible, and more efficient video integration workflows.Multi-view Display For Conference. Credit: Cypress Technology