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Cadence DDR5 IP test chip runs with Micron prototype DRAM

Jessie Shen, DIGITIMES, Taipei Wednesday 9 May 2018 0

Cadence has disclosed a test chip containing next-generation DDR5 memory interface IP, which operates with Micron Technology's prototype DRAM chips. The test chip was fabricated in TSMC's 7nm process, containing both the controller and PHY, according...

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