TSMC is strategically developing a dedicated supply chain cluster on 30 hectares (300,000 square meters) of land in Southern Taiwan Science Park (STSP) to strengthen its advanced...

Strong AI chip demand has led to full utilization of TSMC's fab capacity, benefiting related suppliers such as Siliconware Precision Industries (SPIL) and equipment manufacturers...

The AI surge requires TSMC to swiftly expand its production capacity for chip-on-wafer-on-substrate (CoWoS) packaging. Simultaneously, the foundry's production capacity for 3D-stacked...

With TSMC planning to boost production capacity for CoWoS packaging, related fab toolmakers are confident about orders from the contract chipmaker.

Equipment makers have seen the visibility of TSMC's order extended to 2025, and Intel and OSATs have also placed orders, according to industry sources in Taiwan.

At the 2024 North America Technology Symposium, TSMC demonstrated its latest semiconductor process, advanced packaging, and 3D IC technologies, which will drive the next wave of AI...

Long-term prospects are bright for advanced packaging technology, thanks to robust demand for AI and HPC chips, according to sources at backend houses.

Advanced packaging and testing have become the hottest topics in the semiconductor industry in 2023, with TSMC's CoWoS packaging technology experiencing extremely high demand due...

The importance of advanced packaging to the continuation of Moore's Law has already attracted TSMC and Intel to the field.

AMD plans to incorporate TSMC's 3D SoIC (system on integrated circuits) stacking and chiplet packaging technology into its gaming notebook processors, following the company's implementation...

TSMC's 3D Fabric advanced packaging and testing plant, AP6, has officially started operation. Advanced packaging and testing providers have indicated that the 3D Chiplet and System-on-Integrated-Chip...

TSMC has recently announced SoIC-P, microbump versions of its System on Integrated Chips (SoIC) solutions providing a cost-effective way for 3D chip stacking.

At its 2023 North America Technology Symposium, TSMC showcased progress in its 2nm technology and new 3nm process variants, including an improved N3E.

Nvidia is expected to use TSMC's 3D SoIC (system on integrated chips) stacking and chiplet packaging technology in its high-end processors set to debut between 2024 and 2025, according...

Though TSMC is building advanced wafer fabs in the US, Taiwanese OSAT companies still have concerns about constructing facilities there to provide cutting-edge packaging services...