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Faraday offers 55nm/65nm miniIO with around 40% area-saving

Press release; Meiling Chen, DIGITIMES Asia Wednesday 19 August 2009 0

Faraday Technology has announced the availability of its miniIO at 55nm and 65nm. Compared with general IO pads, Faraday's miniIO reduces the chip area by up to 40% for a pad-limited design with 500 pins, while keeping the same programming IO functionality,...

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