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NEWS TAGGED 3D-STACKING
Tuesday 28 May 2024
Samsung reportedly achieves technical breakthrough, stacking 3D DRAM to 16 layers
Samsung Electronics has successfully stacked the next-gen 3D DRAM to 16 layers, twice as many as its competitor Micron.
Thursday 1 February 2024
Samsung's 3D DRAM R&D team sets foot in Silicon Valley
Samsung Electronics has set up a new memory research and development (R&D) organization to advance 3D DRAM technologies and secure competitiveness through technology differenti...
Friday 20 October 2023
Samsung announces new R&D plans to strengthen its lead in memory
Samsung Electronics is currently dedicated to the R&D of 11nm level DRAM and ninth-generation 3D NAND Flash. The goal is to raise integration to the highest level in the industry,...
Thursday 7 April 2022
Huawei continues to optimize in-house developed chip performance
Guo Ping, Huawei's former rotating chairman, has said that the company continues to optimize its in-house developed chip performance by increasing the area and stacking.
Tuesday 20 June 2017
Samsung ramps up 64-layer V-NAND memory production
Samsung Electronics has begun volume production of 64-layer, 256Gb V-NAND flash memory for use with an expanding line-up of storage solutions for server, PC and mobile applications,...
Tuesday 29 January 2013
STATS ChipPAC, UMC unveil 3D IC developed under open ecosystem model
STATS ChipPAC and United Microelectronics Corporation (UMC) have jointly announced the first demonstration of TSV-enabled 3D IC chip stacking technology developed under an open ecosystem...
Tuesday 20 November 2012
STATS ChipPAC to expand operations in Korea
STATS ChipPAC has announced plans to expand its semiconductor assembly and test operation in South Korea. The Singapore-based backend house added that it has signed a non-binding...
Monday 2 April 2012
Amkor licenses proprietary through-mold-via technology to Shinko
Amkor Technology has announced that the company has granted Shinko Electric Industries a non-exclusive license to its proprietary through-mold-via (TMV) technology.
Friday 16 December 2011
Chip equipment spending to decline following two years of growth, says Gartner
Worldwide semiconductor capital equipment spending is expected to total US$51.7 billion in 2012, a 19.5% decline from projected 2011 spending of US$64.2 billion, according to Gartn...
Tuesday 30 August 2011
Amkor, Globalfoundries team up for advanced assembly, test solutions
Amkor Technology and Globalfoundries have entered into a strategic partnership to develop integrated assembly and test solutions for advanced silicon nodes, according to the companies...
Tuesday 25 January 2011
Nanya, ITRI team up for 3D stacked DRAM
Taiwan-based Nanya Technology has teamed up with government-backed Industrial Technology Research Institute (ITRI) to develop a through silicon via (TSV) technology for high-capacity...
Thursday 1 July 2010
ITRI sets up 3D IC experimental lab
The Taiwan government-backed Industrial Technology Research Institute (ITRI) has announced the establishment of an experimental lab, which deploys 12-inch wafer through silicon via...
Monday 21 June 2010
Elpida, PTI and UMC enter joint development deal for 3D-TSV technology
Elpida Memory, Powertech Technology (PTI) and United Microelectronics Corporation (UMC) have jointly announced their entry into a 3-way cooperation to advance 3D IC integration technologies...
Friday 30 April 2010
Major growth in TSV metrology/inspection equipment expected, says The Information Network
The market for metrology/inspection equipment for 3D through silicon via (TSV) semiconductor packaging looms large, according to The Information Network. The desire for smaller, lighter...
Thursday 15 October 2009
Applied Materials, ITRI team up for 3D chip stack technology
Applied Materials has announced its collaboration with the Taiwan government-backed Industrial Technology Research Institute (ITRI) to accelerate the development and commercialization...