Despite TSMC's robust sales in the past few years and estimated strong performance in 2023, geopolitical tensions will continue to influence the foundry's decision in capacity expansion...
High-profile semiconductor industry leaders in China recently gathered at the just-ended SEMICON China Executive Summit seeking to find ways out for China's future IC development...
For mature manufacturing process, 3D IC packaging is expected to become their alternative solution to advanced processes and will develop faster than expected under the latest US...
ASE Technology and other first-tier IC backend houses have seen their fab capacity utilization rates start loosening, as fabless clients have also begun to ask them to defer order...
OSAT ASE Technology Holding (ASEH) expects its capacity utilization rate to drop slightly in the fourth quarter of 2022, and has revised downward its capex outlook this year by about...
The semiconductor industry players are forming a regional cluster in Europe, with the support of EU's semiconductor initiative to decrease its dependence on Asia. Seeing growing demand...
TSMC is in talks with its major clients about the adoption of its new CoWoS-R+ packaging technology for HPC chips utilizing high-bandwidth memory such as HBM3, according to industry...
TSMC has seen capacity utilization rates for advanced integrated fan-out (InFO) and chip-on-wafer-on-substrate (CoWoS) packaging start loosening in the fourth quarter of 2022, due...
Automotive chips and power devices continue to see uneven supplies, and Taiwan's leading OSATs including ASE Technology and international IDMs such as Infineon, Renesas, NXP, ST Microelectronics...
AMD CEO Lisa Su will meet with her TSMC counterpart CC Wei during her upcoming visit to Taiwan, as the US chip vendor looks to secure support from the foundry house and other value...
AMD chair and CEO Lisa Su will arrive in Taiwan in early October to meet major suppliers including TSMC and ASE Technology, according to industry sources.
MediaTek is set to mass produce its new HPC chips at TSMC in 2023 using advanced process node and CoWoS (chip on wafer on substrate) packaging technology, according to backend supply...
Equipment demand for mid- to high-end flip-chip (FC) and other advanced packaging remains robust, while demand for conventional wirebonding packaging is slowing down, according to...
TSMC is involved in an R&D project led by Nvidia to use its silicon photonic (SiPh) integration technology called COUPE (compact universal photonic engine) for graphics hardware...