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Sep 2, 11:58
Marvell sees silicon photonics scaling from late 2027, with Taiwan and TSMC at the center
Marvell SVP and chief technology officer Radha Nagarajan offered a clearer timeline for the commercialisation of co-packaged optics, or CPO, during a media briefing at SEMICON Taiwan 2026.
A senior Lam Research executive told an industry audience this week that the next major leap in semiconductor manufacturing will not come from removing humans entirely from fabs, but from pairing collaborative robots with AI-driven predictive maintenance to close a long-standing gap in fab operations.
At a shared stage at Semicon Taiwan 2026, executives from Samsung Electronics, SK Hynix, and Micron agreed that traditional 2.5D high-bandwidth memory (HBM) using interposers is approaching a performance ceiling. Consequently, the industry is transitioning toward 3D vertical stacking architectures to minimize transmission power consumption and leverage wafer-level bonding technologies.
The UK wants to understand how Taiwan built such a successful semiconductor ecosystem, said Andy McLean, CEO of the UK Semiconductor Center, at a forum organized by Taiwan's Ministry of Economic Affairs (MOEA) in Taipei on September 1. It is generally believed that government support, close collaboration among industry, academia and research institutions, and corporate long-term vision are key drivers of Taiwan's semiconductor success.
On the eve of the opening of SEMICON Taiwan 2026, the Ministry of Economic Affairs (MOEA) hosted the Semicon Network Summit, where President Ching-Te Lai said Nvidia invests and procures more than NT$3 trillion (US$94.4 billion) a year in Taiwan. He added that Micron has invested more than NT$1.4 trillion cumulatively, while AMD has expanded its Taiwan R&D and investment to more than NT$300 billion.
Exhibiting in the AI Technology Zone at Semicon Taiwan 2026, Zhen Ding Technology (ZDT) Group highlights two core product lines: 800G, 1.6T, XPO, and NPO high-end optical transceiver modules, and ultra-high-layer AI server boards with up to 34 layers. The showcase underscores the company's advanced printed circuit board (PCB) engineering capabilities for next-generation AI computing infrastructure, spanning high-speed data transmission to multi-layer board designs.
Samsung Electronics and SK Hynix ended the first half of 2026 holding sharply more inventory than six months earlier, an unusual development in a memory market where demand continues to strain available supply.
Cloud AI capital expenditure continues to shatter market expectations, sparking growing concerns over whether the spending surge is overheating and heading toward a bubble. Semicon Taiwan 2026 may serve as the ultimate litmus test for this debate.
As AI and high-performance computing (HPC) continue to drive semiconductor advances, industry competition is shifting beyond chip performance toward packaging, cooling, assembly, and power delivery. With GPUs, high-bandwidth memory (HBM), and advanced packaging pushing power density higher, chipmakers now face challenges that extend well beyond silicon manufacturing, including managing thermal expansion, warpage, heat dissipation, and reliability across heterogeneously integrated materials.
TSMC will set up operations in Kaohsiung's Baipu Industrial Park, helping create Taiwan's first advanced packaging materials and equipment supply-chain cluster. Closely watched by the industry, the move is expected to improve efficiency by 25% to 50% as the company builds a collaborative verification platform with suppliers.
TSMC has asked materials and equipment suppliers to develop 5-micrometer-class microbump bonding and underfill technology for advanced HBM packaging, according to ETNews, signaling that the foundry may continue scaling conventional microbumps rather than shift immediately to hybrid bonding.
As Semicon Taiwan 2026 gets underway, semiconductor test-interface structural parts maker Certain Micro Application Technology (CMAT) announced three core product lines aimed at rising AI and high-performance computing (HPC) chip testing demand: fine drilling for upper and lower guide plates, probe card structural components, and ATE Stiffener test frames.