These are the most-read DIGITIMES Asia stories in the week of April 8 - April 12.
China's JCET confirms advanced packaging capability for chips below 5nm
In response to investors' questions online, Jiangsu Changjiang Electronics Technology (JCET), a leading Chinese packaging and testing company, said it has offered advanced packaging services based on industry-leading technology to meet the needs of chips at 5nm and below. The company also has cooperated with top wafer foundries at various nodes of advanced processes.
Meanwhile, SMIC confirmed that it had adopted deep ultraviolet (DUV) lithography machines to produce N+1 process (similar to 7nm process) chips in limited quantities at the end of 2020.
Memory chip vendors suspend 2Q24 contract pricing in the wake of Taiwan tremor
Industry sources said Micron, which has DRAM production capacity in Taiwan, stopped offering product quotes for the second quarter of 2024 shortly after a strong earthquake struck the island on April 3. Samsung Electronics and SK Hynix have followed suit. The temporary suspension of product quotes offering suggested that memory chip prices might surge as the earthquake impacted some wafer fabs' production in Taiwan.
Micron to raise DRAM and SSD prices by 25%, say sources
According to memory module houses, Micron Technology has told customers that it plans to increase its DRAM and SSD product prices by over 25% sequentially during the second quarter of 2024. Price negotiations have been undergone between memory vendors and their customers. Sources said some vendors have already settled on quotations due to the significant bargaining strength of suppliers in the current sellers' market.
TSMC likely to raise wafer prices for 5/3nm processes
As demand remains robust and production costs continue to increase, industry sources said TSMC might raise its wafer prices for 5/3nm processes. The Taiwan-based foundry house faces pressure from rising electricity bills and water shortages in addition to the impacts of an earthquake on April 3. UMC said the natural disaster did not cause material impact on its operations. Automatic safety measures at the company's fabs in Hsinchu and Fab 12A in Tainan were triggered and some wafers in the production line were affected.
TSMC to enter 2nm, A14 process generations on schedule
Sources in the semiconductor equipment industry said TSMC is progressing toward entering the A14 and 2nm process generations as planned. The company is committed to production timelines, whether the officially published process node plan or the roadmap released to the supply chain. Sources said TSMC has a clear roadmap for the next five years. The manufacturing foundation and timeframe for mass production of the next-generation 2nm and A14 processes have been determined, as have the plans for additional fabs in the US, Japan, and Germany.
Intel goal to have half of global advanced chip production in the US and Europe... depends on Asia
Luring Asian semiconductor companies to the US and shifting new wafer fab projects from Asia to the American continent is critical to boosting US production capacity. The strategy will also be fundamental to achieving Intel CEO Pat Gelsinger's goal of producing at least 50% of the world's advanced semiconductors in the US and Europe by 2030. About US$10 billion of the US CHIPS and Science Act subsidies have not been allocated. Intel, TSMC, Samsung, Micron, GlobalFoundries (GF), Microchip, and BAE Systems might share about 70% of the budget.
US and Japan to rule out dependence on China
The US and Japanese governments have agreed to jointly establish regulations for semiconductors, batteries, permanent magnets, and other strategic materials. They will also promote offshore wind power. According to Nikkei, several nations will provide incentives to industries related to semiconductors and net-zero carbon emissions to avoid overdependence on specific countries with conditions formed by the US and Japan. A joint statement after the US-Japan summit on April 10 will cover these matters.
