Mentor Graphics recently announced a new formal-based technologies in the Questa Verification Platform that provide mainstream users with the ability to more easily perform exhaustive formal verification analysis. The new Questa AutoCheck technology delivers fully automated formal checking analysis, while the Questa CoverCheck tool provides 100% code coverage closure. The Questa Verification Platform now also offers expanded clock-domain crossing (CDC) capabilities.
Formal verification offers exhaustive functional analysis of all possible design behaviors without the need to specify the test stimulus, enabling verification early in the design cycle, before creation of a simulation testbench. However, in the past, the promise of formal verification was only realized by verification teams with formal analysis experts that had to expend a high amount of effort to achieve results. The Questa platform changes all that by delivering a wide spectrum of formal applications that range from fully automatic formal checking with AutoCheck, a powerful, push-button technology that everyone can easily use, to property checking with custom coded assertions for advanced users. The Questa platform offers a broad arsenal of verification solutions that seamlessly blend simulation and formal-based technologies with common compilation and user interface features as well as the Unified Coverage Database (UCDB).
The Questa CoverCheck technology also accelerates the process of code coverage closure. Code coverage closure typically involves many engineering weeks of effort to manually review code coverage holes to determine if they can be safely ignored and if not, to generate hand- crafted simulation tests to cover them. Questa CoverCheck makes it possible for non-expert users to leverage formal methods to complete this process by automatically identifying the set of reachable and unreachable coverage bins. Consequently, it significantly reduces the time required for code coverage sign-off, bringing predictability to the schedule. CoverCheck also ensures higher design quality by preventing bugs from slipping through the verification process due to mistakenly ignored code coverage bins.
Concerning AutoCheck, it analyzes RTL designs and automatically synthesizes assertions that are then processed by powerful formal engines to check for correct sequential design behavior. Using AutoCheck, designs are easily verified to be free from common functional errors without the need to write a testbench or assertions. In addition, performance improvements based on breakthrough formal engines and formal model optimizations deliver improved quality of results and a significant decrease in compute resource consumption. This release also delivers Questa Formal Multi-Core, a new capability that enables multi-core and multi- computer distribution of formal jobs, further improving the throughput of formal analysis and optimizing the use of compute farm resources.
