HiSilicon expands adoption of Cadence tools and IP for advanced-node FinFET designs

Press release; Jessie Shen, DIGITIMES Asia Tuesday 2 December 2014 0

Cadence Design Systems announced on December 1 that HiSilicon Technologies has signed an agreement to significantly expand its use of the Cadence digital and custom/analog flows for 16nm FinFET designs, and to collaborate on the design flow for 10nm...

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