The open-standard instruction set architecture (ISA) RISC-V has been integral to China's IC design development as it pursues greater autonomy. The currently ongoing RISC-V Summit China 2023, taking place in Beijing between August 23 - 25, has brought together leading fabless players in the Chinese semiconductor industry, including T-Head Semiconductor and SiFive.
Talking to DIGITIMES Asia a week ahead of the summit, Jack Kang, Senior Vice President of Business Development, Customer Experience, Corporate Marketing at SiFive, highlighted that China is the fastest growing market for IC design, and that there are "more designs happening in China than in other geographies right now."
The rise of vertical semiconductor
Krste Asanovic, RISC-V International chairman and SiFive co-founder, previously estimated that RISC-V cores will reach at least 80 billion in shipment volume before 2025. Meanwhile, as Ho Ning, CTO of Beijing ESWIN Technology, indicated at the RISC-V summit, the shipment volume of China's RISC-V cores will take up approximately 50% of the global total before 2027. After more than ten years of development, a total of 10 billion RISC-V processors have been shipped in 2022. In comparison, it took 30 years for x86 and ARM architectures to reach that volume.
Referring to the concept of "vertical semiconductor" - a term first brought up by Asanovic in light of more big tech companies like Apple and Tesla moving chip designs in house - Kang reiterated the belief that an open-standard architecture like RISC-V perfectly caters to the trend of vertical semiconductor. Much in the same fashion that the x86 architecture grew with the PC era and the ARM architecture thrived on the smartphone era: as RISC-V is an open standard, multiple engineers can build to that standard, and software systems will grow much faster, noted Kang. For Chinese companies seeking to reduce dependency, they want to be part of an open standard system where there will be multiple vendors.
"I don't think people like being dependent on a single company, and that includes SiFive," Kang said, remarking that RISC-V is unique as chipmakers can choose to use SiFive and even SiFive competitors. In comparison, noted Kang, Arm has a proprietary ecosystem, and if it wants to raise prices, customers have no choice. Even though RISC-V is open-standard, one can have a lot of different implementations, from high-quality, high-performance, low-power designs to those with poor performance. "Just because it's RISC-V doesn't mean it's the same," commented Kang, when asked about SiFive's competitiveness in the RISC-V ecosystem.
Owing to the fact that China's swiftly developing EV ecosystem and vehicle electrification trend has put its automakers under a lot of pressure to keep up with competitors at home and overseas, Kang also emphasized RISC-V's significance to the Chinese auto sector for the flexibility it offers.
Regarding chiplet technology - a More-than-Moore solution that is also gaining traction in China, Kang commented that the long-term dream where everybody wants to get to is to get different chiplets from different vendors working together like LEGO blocks, and one can package them together to get a complete solution. "I don't think we are there yet," said the SiFive senior vice president, commenting that the chiplet landscape is mainly characterized by a single vendor, like Intel and AMD, breaking up their designs into chiplets.
Nevertheless, Kang sees RISC-V playing a very important role in chiplet development. "When you're connecting all these systems together, the most important one is still the compute," he noted, believing that chiplet technology will be realized sooner in certain highend markets like datacenter and automotive.
Regarding the recent rise of ChatGPT, Kang also highlighted the advantages offered by RISC-V architecture's vector processing, especially when it comes to edge inference. "If you look at the MCUs in the market, they probably have hardware that's very good for convolutional neural networks (CNN), since it was what was really hot one year ago," said Kang. "And now, with ChatGPT, everybody wants to run transformers, which is a different algorithm than CNN, but your hardwired engine that does the CNN cannot run the transformers."
"From a RISC-V perspective, it has to be a combination of things." While vectors are good at being a programmable engine to run transformers, they are still not as good as dedicated hardwired engines. Therefore, Kang sees vectors working alongside dedicated hardwired engines to do pre-processing or post-processing. "The vectors that SiFive provides are very scalable," said Kang, noting that they can scale to smaller hardware for edge applications or scale up to be run in data centers. "We have a flexible programming thing that can go from small to big."
RISC-V up in the space
In this context, Kang mentioned SiFive's X280 vector core optimized for edge inference. The multi-core capable processor is designated for applications requiring high-throughput, single-thread performance while under significant power constraints. In 2022, notably, X280 was adopted for NASA's next-generation High-Performance Spaceflight Computing (HPSC) processor to be used in every future space mission, especially as the computing power boost it brought will bring advanced functions like autonomous capabilities and vision processing into space. Compared to today's space computers, the X280 has demonstrated a 100x increase in compute capabilities.
"If you look at the space, it's an example of a vertical business, as it has very unique requirements," Kang observed, pointing out that NASA is seeking to move faster by adopting more commercial solutions. In fact, NASA's selection of SiFive pointed to the long-term growth potential of the RISC-V ecosystem. As Kang explained, the long duration requirements of space products mean that space industry players like NASA have to identify the best ecosystem in the long term, including the amount of support available in the future. Though the SiFive vice president acknowledged that RISC-V is still young today and enjoys lesser ecosystem support compared to rivaling architectures like X86 and ARM, it is rapidly catching up.
"What will be the best ecosystem 10 years from now? Which ecosystem will I find the most programmers working on? And then that answer becomes very clear, it's going to be RISC-V," Kang emphasized.
